Details
| Original language | English |
|---|---|
| Pages (from-to) | 31-50 |
| Number of pages | 20 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Publication status | Published - 1997 |
| Event | 1997 IEEE International Symposium on Circuits and Systems, ISCAS 1997 - Hongkong, Hong Kong Duration: 9 Jun 1997 → 12 Jun 1997 |
Abstract
An overview on architectures for implementations of present video compression schemes is presented. Dedicated function specific implementations and programmable video signal processors are included. As examples for the dedicated approach, architectures for DCT, block matching and variable-length decoding will be discussed. The general architectural approaches applied in video signal processors to increase the performance for video coding applications are described. Design examples of video processors reported in the literature are briefly presented.
ASJC Scopus subject areas
- Engineering(all)
- Electrical and Electronic Engineering
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In: Proceedings - IEEE International Symposium on Circuits and Systems, 1997, p. 31-50.
Research output: Contribution to journal › Conference article › Research › peer review
}
TY - JOUR
T1 - Video compression architectures
AU - Pirsch, P.
AU - Berekovic, M.
AU - Freimann, A.
AU - Stolberg, H. J.
PY - 1997
Y1 - 1997
N2 - An overview on architectures for implementations of present video compression schemes is presented. Dedicated function specific implementations and programmable video signal processors are included. As examples for the dedicated approach, architectures for DCT, block matching and variable-length decoding will be discussed. The general architectural approaches applied in video signal processors to increase the performance for video coding applications are described. Design examples of video processors reported in the literature are briefly presented.
AB - An overview on architectures for implementations of present video compression schemes is presented. Dedicated function specific implementations and programmable video signal processors are included. As examples for the dedicated approach, architectures for DCT, block matching and variable-length decoding will be discussed. The general architectural approaches applied in video signal processors to increase the performance for video coding applications are described. Design examples of video processors reported in the literature are briefly presented.
UR - http://www.scopus.com/inward/record.url?scp=0030685853&partnerID=8YFLogxK
M3 - Conference article
AN - SCOPUS:0030685853
SP - 31
EP - 50
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
SN - 0271-4310
T2 - 1997 IEEE International Symposium on Circuits and Systems, ISCAS 1997
Y2 - 9 June 1997 through 12 June 1997
ER -