Details
Original language | English |
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Title of host publication | 2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2016 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (electronic) | 9781509021062 |
Publication status | Published - 29 Apr 2016 |
Event | 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2016 - Montpellier, France Duration: 18 Apr 2016 → 20 Apr 2016 |
Abstract
In modern metallization systems mechanical stress due to CTE mismatch is one of the reliability problems. With the help of finite element simulations the thermal-electrical-mechanical behavior can be calculated. The use of a reference temperature for the stress free state in the simulations is insufficient to determine the stress field in the metallization. The intrinsic stress resulting from the processing is hereby not considered. The simulation of the process steps by the birth and die capability of ANSYS is time consuming and complex. A possibility to consider the intrinsic stress in the metallization system is the use of averaged CTEs from measurements of a multi-level stack depending on the horizontal running direction of the interconnect in the x- or y-direction, or in from literature. The values were taken for a comparison between calculated stress field of the stacked metallization system with process steps and the reference temperature for the stress free state. The achieved simulation results help for a better understanding of the stress behavior.
ASJC Scopus subject areas
- Materials Science(all)
- Electronic, Optical and Magnetic Materials
- Engineering(all)
- Electrical and Electronic Engineering
- Materials Science(all)
- Surfaces, Coatings and Films
- Mathematics(all)
- Modelling and Simulation
- Engineering(all)
- Safety, Risk, Reliability and Quality
- Engineering(all)
- Industrial and Manufacturing Engineering
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2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7463354.
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Thermal-electric-mechanical simulation of a multilevel metallization system
AU - Liu, Yanpeng
AU - Weide-Zaage, Kirsten
N1 - Publisher Copyright: © 2016 IEEE. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2016/4/29
Y1 - 2016/4/29
N2 - In modern metallization systems mechanical stress due to CTE mismatch is one of the reliability problems. With the help of finite element simulations the thermal-electrical-mechanical behavior can be calculated. The use of a reference temperature for the stress free state in the simulations is insufficient to determine the stress field in the metallization. The intrinsic stress resulting from the processing is hereby not considered. The simulation of the process steps by the birth and die capability of ANSYS is time consuming and complex. A possibility to consider the intrinsic stress in the metallization system is the use of averaged CTEs from measurements of a multi-level stack depending on the horizontal running direction of the interconnect in the x- or y-direction, or in from literature. The values were taken for a comparison between calculated stress field of the stacked metallization system with process steps and the reference temperature for the stress free state. The achieved simulation results help for a better understanding of the stress behavior.
AB - In modern metallization systems mechanical stress due to CTE mismatch is one of the reliability problems. With the help of finite element simulations the thermal-electrical-mechanical behavior can be calculated. The use of a reference temperature for the stress free state in the simulations is insufficient to determine the stress field in the metallization. The intrinsic stress resulting from the processing is hereby not considered. The simulation of the process steps by the birth and die capability of ANSYS is time consuming and complex. A possibility to consider the intrinsic stress in the metallization system is the use of averaged CTEs from measurements of a multi-level stack depending on the horizontal running direction of the interconnect in the x- or y-direction, or in from literature. The values were taken for a comparison between calculated stress field of the stacked metallization system with process steps and the reference temperature for the stress free state. The achieved simulation results help for a better understanding of the stress behavior.
UR - http://www.scopus.com/inward/record.url?scp=84974559955&partnerID=8YFLogxK
U2 - 10.1109/eurosime.2016.7463354
DO - 10.1109/eurosime.2016.7463354
M3 - Conference contribution
AN - SCOPUS:84974559955
BT - 2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2016
Y2 - 18 April 2016 through 20 April 2016
ER -