Details
| Original language | English |
|---|---|
| Title of host publication | CIPS 2016 |
| Subtitle of host publication | 9th International Conference on Integrated Power Electronics Systems |
| Publisher | VDE Verlag GmbH |
| Number of pages | 6 |
| ISBN (print) | 9783800741717 |
| Publication status | Published - 2019 |
| Event | 9th International Conference on Integrated Power Electronics Systems, CIPS 2016 - Nuremberg, Germany Duration: 8 Mar 2016 → 10 Mar 2016 |
Abstract
This paper proposes a method to estimate the junction temperature of a SiC JFET by evaluation of the voltage drop of the internal gate source diode. This information is used to identify the thermal impedance. First, the voltage drop of the diode is characterised with the SiC JFET heated by a heating plate. Secondly, the thermal path from junction to fluid is modelled and analysed. The device is heated by on-state power dissipation, and the cooling down process is evaluated to calculate the thermal impedance. In this context, the influence of fluid temperature, power loss and flow rate is appraised. Finally, a gate drive circuit with associated simulations is presented which is capable of measuring the temperature-dependent forward and breakdown voltage of the gate source diode during switching operation.
ASJC Scopus subject areas
- Energy(all)
- Energy Engineering and Power Technology
- Engineering(all)
- Electrical and Electronic Engineering
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CIPS 2016: 9th International Conference on Integrated Power Electronics Systems. VDE Verlag GmbH, 2019.
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Thermal Impedance Identification of a SiC JFET Module
AU - Merkert, Arvid
AU - Weber, Simon
AU - Mertens, Axel
N1 - Funding Information: The authors would like to thank the Forschungsvereinigung Antriebstechnik e.V. for supporting this work, especially K. Heyers, T. Kalker, F. M ¨anken, T. Peuser, S. Schmitz and U. Schwarzer for the interesting and productive discussions.
PY - 2019
Y1 - 2019
N2 - This paper proposes a method to estimate the junction temperature of a SiC JFET by evaluation of the voltage drop of the internal gate source diode. This information is used to identify the thermal impedance. First, the voltage drop of the diode is characterised with the SiC JFET heated by a heating plate. Secondly, the thermal path from junction to fluid is modelled and analysed. The device is heated by on-state power dissipation, and the cooling down process is evaluated to calculate the thermal impedance. In this context, the influence of fluid temperature, power loss and flow rate is appraised. Finally, a gate drive circuit with associated simulations is presented which is capable of measuring the temperature-dependent forward and breakdown voltage of the gate source diode during switching operation.
AB - This paper proposes a method to estimate the junction temperature of a SiC JFET by evaluation of the voltage drop of the internal gate source diode. This information is used to identify the thermal impedance. First, the voltage drop of the diode is characterised with the SiC JFET heated by a heating plate. Secondly, the thermal path from junction to fluid is modelled and analysed. The device is heated by on-state power dissipation, and the cooling down process is evaluated to calculate the thermal impedance. In this context, the influence of fluid temperature, power loss and flow rate is appraised. Finally, a gate drive circuit with associated simulations is presented which is capable of measuring the temperature-dependent forward and breakdown voltage of the gate source diode during switching operation.
UR - http://www.scopus.com/inward/record.url?scp=85084023578&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85084023578
SN - 9783800741717
BT - CIPS 2016
PB - VDE Verlag GmbH
T2 - 9th International Conference on Integrated Power Electronics Systems, CIPS 2016
Y2 - 8 March 2016 through 10 March 2016
ER -