Single-electron transistors realized in in-plane-gate and top-gate technology

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  • Max Planck Institute for Solid State Research (MPI-FKF)
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Original languageEnglish
Pages (from-to)995-999
Number of pages5
JournalSolid state electronics
Volume37
Issue number4-6
Publication statusPublished - 1 Jan 1994
Externally publishedYes

Abstract

Using the two-dimensional electron gas (2DEG) in an AlGaAs/GaAs heterostructure the zero-dimensional system necessary for the observation of charging effects (single-electron effects) can either be realized by etching trenches and using the in-plane-gate technology or by depleting the 2DEG with the help of gate structures evaporated on top of the heterostructure. In such structures single-electron effects are studied in dependence of the applied gate voltages, the source-drain voltage and the magnetic field. The advantages and disadvantages of the different structures are discussed.

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Single-electron transistors realized in in-plane-gate and top-gate technology. / Haug, R. J.; Pothier, H.; Weis, J. et al.
In: Solid state electronics, Vol. 37, No. 4-6, 01.01.1994, p. 995-999.

Research output: Contribution to journalArticleResearchpeer review

Haug RJ, Pothier H, Weis J, v. Klitzing K, Ploog K. Single-electron transistors realized in in-plane-gate and top-gate technology. Solid state electronics. 1994 Jan 1;37(4-6):995-999. doi: 10.1016/0038-1101(94)90344-1
Haug, R. J. ; Pothier, H. ; Weis, J. et al. / Single-electron transistors realized in in-plane-gate and top-gate technology. In: Solid state electronics. 1994 ; Vol. 37, No. 4-6. pp. 995-999.
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AU - Pothier, H.

AU - Weis, J.

AU - v. Klitzing, K.

AU - Ploog, K.

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