Details
| Original language | English |
|---|---|
| Article number | 4595633 |
| Pages (from-to) | 442-448 |
| Number of pages | 7 |
| Journal | IEEE Transactions on Device and Materials Reliability |
| Volume | 8 |
| Issue number | 3 |
| Publication status | Published - Sept 2008 |
Abstract
Due to miniaturization, the width of interconnects, as well as the dimensions of solder bumps, decreases. As a result of the finer pitch, the density of solder bumps in flip-chip designs increases. This allows the usage of small 3-D assembly technologies like package-on-package in compact applications. The reduction of the geometrical dimensions leads to an increase of the carried current density in the solder bumps. Due to the device design rules, the current flowing through such a solder bump in flip-chip designs extends, for instance, from 0.2 to 0.4 A. The geometry of the solder bump and the trace leads to current density distributions with high local concentrations, which are known as current crowding (CC). CC is occurring at the contact between the trace and the solder bump, as well as in discontinuities of the traces like vias, etc. Due to CC migration, effects like electro- and thermomigration become critical reliability problems in such assembly technologies [3], [4], [19], [20]. Under high dc current density conditions, electromigration in the solder joint is known as a reliability concern for high-density flip-chip packaging and power packaging [8]. This paper will give an overview of thermal-electrical and mechanical finite-element simulations of migration effects in solder bumps and related assembly technologies. The effects will be illustrated by some simulation examples.
Keywords
- Electromigration, Packaging, Reliability, Simulation, Solder bumps
ASJC Scopus subject areas
- Materials Science(all)
- Electronic, Optical and Magnetic Materials
- Engineering(all)
- Safety, Risk, Reliability and Quality
- Engineering(all)
- Electrical and Electronic Engineering
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In: IEEE Transactions on Device and Materials Reliability, Vol. 8, No. 3, 4595633, 09.2008, p. 442-448.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - Simulation of migration effects in solder bumps
AU - Weide-Zaage, Kirsten
N1 - Copyright: Copyright 2008 Elsevier B.V., All rights reserved.
PY - 2008/9
Y1 - 2008/9
N2 - Due to miniaturization, the width of interconnects, as well as the dimensions of solder bumps, decreases. As a result of the finer pitch, the density of solder bumps in flip-chip designs increases. This allows the usage of small 3-D assembly technologies like package-on-package in compact applications. The reduction of the geometrical dimensions leads to an increase of the carried current density in the solder bumps. Due to the device design rules, the current flowing through such a solder bump in flip-chip designs extends, for instance, from 0.2 to 0.4 A. The geometry of the solder bump and the trace leads to current density distributions with high local concentrations, which are known as current crowding (CC). CC is occurring at the contact between the trace and the solder bump, as well as in discontinuities of the traces like vias, etc. Due to CC migration, effects like electro- and thermomigration become critical reliability problems in such assembly technologies [3], [4], [19], [20]. Under high dc current density conditions, electromigration in the solder joint is known as a reliability concern for high-density flip-chip packaging and power packaging [8]. This paper will give an overview of thermal-electrical and mechanical finite-element simulations of migration effects in solder bumps and related assembly technologies. The effects will be illustrated by some simulation examples.
AB - Due to miniaturization, the width of interconnects, as well as the dimensions of solder bumps, decreases. As a result of the finer pitch, the density of solder bumps in flip-chip designs increases. This allows the usage of small 3-D assembly technologies like package-on-package in compact applications. The reduction of the geometrical dimensions leads to an increase of the carried current density in the solder bumps. Due to the device design rules, the current flowing through such a solder bump in flip-chip designs extends, for instance, from 0.2 to 0.4 A. The geometry of the solder bump and the trace leads to current density distributions with high local concentrations, which are known as current crowding (CC). CC is occurring at the contact between the trace and the solder bump, as well as in discontinuities of the traces like vias, etc. Due to CC migration, effects like electro- and thermomigration become critical reliability problems in such assembly technologies [3], [4], [19], [20]. Under high dc current density conditions, electromigration in the solder joint is known as a reliability concern for high-density flip-chip packaging and power packaging [8]. This paper will give an overview of thermal-electrical and mechanical finite-element simulations of migration effects in solder bumps and related assembly technologies. The effects will be illustrated by some simulation examples.
KW - Electromigration
KW - Packaging
KW - Reliability
KW - Simulation
KW - Solder bumps
UR - http://www.scopus.com/inward/record.url?scp=54949146119&partnerID=8YFLogxK
U2 - 10.1109/TDMR.2008.2002342
DO - 10.1109/TDMR.2008.2002342
M3 - Article
AN - SCOPUS:54949146119
VL - 8
SP - 442
EP - 448
JO - IEEE Transactions on Device and Materials Reliability
JF - IEEE Transactions on Device and Materials Reliability
SN - 1530-4388
IS - 3
M1 - 4595633
ER -