471 Results

1. 1997
2. Published

   Heterogeneous multiprocessor scheduling and allocation using evolutionary algorithms

   Reuter, C., Schwiegershausen, M. & Pirsch, P., 1997, p. 294-303. 10 p.

   Research output: Contribution to conference › Paper › Research › peer review

3. Published

   HiPAR-DSP: A parallel VLIW RISC processor for real time image processing applications

   Wittenburg, J. P., Ohmacht, M., Kneip, J., Hinrichs, W. & Pirsch, P., 1997, 1997 3rd International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 1997. Zhou, W., Goscinski, A. & Hobbs, M. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 155-162 8 p. 651487. (1997 3rd International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 1997).

   Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

4. Published

   Performance prediction for complex parallel applications

   Brehm, J. & Worley, P. H., 1997, In: Proceedings of the International Parallel Processing Symposium, IPPS. p. 187-191 5 p.

   Research output: Contribution to journal › Conference article › Research › peer review

5. 1996
6. Published

   A low cost homodyne reflectometer based on the FMCW method and digital signal processing

   Geck, B., Marquardt, J. & Sagebiel, M., 1996, p. 799-802. 4 p.

   Research output: Contribution to conference › Paper › Research › peer review

7. Published

   Der HiPAR-DSP: Ein programmierbarer monolithischer parallelprozessor für die echtzeitbildverarbeitung

   Kneip, J., Wittenburg, J. P., Hinrichs, W., Berekovic, M. & Pirsch, P., 1996, In: ITG-Fachbericht. 138, p. 55-60 6 p.

   Research output: Contribution to journal › Article › Research › peer review

8. Published

   Programmable processing element dedicated as building block for a large area integrated multiprocessor system

   Herrmann, K., Hilgenstock, J., Gaedke, K., Jeschke, H. & Pirsch, P., 1996, Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon. p. 98-103 6 p. (Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon).

   Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

9. 1995
10. Published

    System level design methodology for the optimization of heterogeneous multiprocessors

    Schwiegershausen, M. & Pirsch, P., 1995, In: Proceedings of the International Symposium on System Synthesis. p. 162-167 6 p.

    Research output: Contribution to journal › Conference article › Research › peer review

11. 1994
12. Published

    Data path array with shared memory as core of a high performance DSP

    Kneip, J., Roenner, K. & Pirsch, P., 1994, In: Proceedings of the International Conference on Application Specific Array Processors. p. 271-282 12 p.

    Research output: Contribution to journal › Conference article › Research › peer review

13. 1993
14. Published

    Image processing board for real-time extraction of line symbols from video sequences for AGV

    Schönfeld, J. & Pirsch, P., 1993, Proceedings of IEEE Workshop on VLSI Signal Processing VI, VLSISP 1993. Institute of Electrical and Electronics Engineers Inc., p. 30-38 9 p. 404505. (Proceedings of IEEE Workshop on VLSI Signal Processing VI, VLSISP 1993).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

15. 1992
16. Published

    VLSI realization of 2D HDTV subband filter-banks with on-chip line memories and FIFOs

    Grüger, K., Winzker, M., Gehrke, W. & Pirsch, P., 1992, ESSCIRC 1992 : 18th European Solid-State Circuits Conference, Proceedings. IEEE Computer Society, p. 319-322 4 p. 5468153. (European Solid-State Circuits Conference; vol. 1992-September).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

17. 1989
18. Published

    An algorithm for computing the signal propagation on lossy VLSI interconnect systems in the time domain

    Grabinski, H., Apr 1989, In: Integration, the VLSI Journal. 7, 1, p. 35-48 14 p.

    Research output: Contribution to journal › Article › Research › peer review