460 Results

1. 1997

2. MPEG-4: Audio/video and synthetic graphics/audio for mixed media

   Doenges, P. K., Capin, T. K., Lavagetto, F., Ostermann, J., Pandzic, I. S. & Petajan, E. D., May 1997, In: Signal Processing: Image Communication. 9, 4, p. 433-463 31 p.

   Research output: Contribution to journal › Article › Research › peer review

3. Published

   Automatic adaptation of a face model in a layered coder with an object-based analysis-synthesis layer and a knowledge-based layer

   Kampmann, M. & Ostermann, J., Mar 1997, In: Signal Processing: Image Communication. 9, 3, p. 201-220 20 p.

   Research output: Contribution to journal › Article › Research › peer review

4. Published

   An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor

   Kneip, J., Berekovic, M., Wittenburg, J. P., Hinrichs, W. & Pirsch, P., 1997, In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 16, 1, p. 31-40 10 p.

   Research output: Contribution to journal › Article › Research › peer review

5. Published

   An algorithm-hardware-system approach to VLIW multimedia processors

   Kneip, J., Berekovic, M. & Pirsch, P., 1997, 1997 IEEE 1st Workshop on Multimedia Signal Processing, MMSP 1997. Wang, Y., Reibman, A. R., Juang, B. H., Chen, T. & Kung, S.-Y. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 433-438 6 p. 602673. (1997 IEEE 1st Workshop on Multimedia Signal Processing, MMSP 1997).

   Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

6. Published

   Hardware realization of a Java Virtual Machine for high performance multimedia applications

   Berekovic, M., Kloos, H. & Pirsch, P., 1997, p. 479-488. 10 p.

   Research output: Contribution to conference › Paper › Research › peer review

7. Published

   HiPAR-DSP: A parallel VLIW RISC processor for real time image processing applications

   Wittenburg, J. P., Ohmacht, M., Kneip, J., Hinrichs, W. & Pirsch, P., 1997, 1997 3rd International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 1997. Zhou, W., Goscinski, A. & Hobbs, M. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 155-162 8 p. 651487. (1997 3rd International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 1997).

   Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

8. 1996
9. Published

   CAD tool for the optimization of video signal processor architectures

   Kropp, H., Schwiegershausen, M. & Pirsch, P., 1996, In: Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP). 2, p. 1244-1247 4 p.

   Research output: Contribution to journal › Conference article › Research › peer review

10. Published

    Memory efficient list based Hough transform for programmable digital signal processors with on-chip caches

    Kneip, J. & Pirsch, P., 1996, p. 191-194. 4 p.

    Research output: Contribution to conference › Paper › Research › peer review

11. Published

    Object based data cache with conflict free concurrent access as shared memory for a parallel DSP

    Kneip, J. & Pirsch, P., 1996, p. 25-34. 10 p.

    Research output: Contribution to conference › Paper › Research › peer review

12. 1995
13. Published

    The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques

    Schönfeld, M., Franzen, J., Schwiegershausen, M., Pirsch, P., Vehlies, U. & Münzner, A., 1 Oct 1995, In: Journal of VLSI Signal Processing. 11, 1-2, p. 51-74 24 p.

    Research output: Contribution to journal › Article › Research › peer review

14. Published

    Algorithm adapted autonomous controlling concept for a parallel single-chip digital signal processor

    Kneip, J., Wittenburg, J. P., Berekovic, M., Ronner, K. & Pirsch, P., 1995, p. 41-50. 10 p.

    Research output: Contribution to conference › Paper › Research › peer review

15. Published

    VLSI architectures for video compression

    Pirsch, P. & Gehrke, W., 1995, p. 49-54. 6 p.

    Research output: Contribution to conference › Paper › Research › peer review

16. 1994
17. Published

    A hierarchical multiprocessor architecture based on heterogeneous processors for video coding applications

    Gehrke, W., Hoffer, R. & Pirsch, P., 1994, In: Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP). 2, p. II413-II416 389633.

    Research output: Contribution to journal › Conference article › Research › peer review

18. Published

    Architecture and VLSI implementation of a RISC core for a monolithic video signal processor

    Herrmann, K., Seifert, M., Gaedke, K., Jeschke, H. & Pirsch, P., 1994, p. 368-377. 10 p.

    Research output: Contribution to conference › Paper › Research › peer review

19. 1993
20. Published

    A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications

    Gaedke, K., Jeschke, H. & Pirsch, P., 1 Apr 1993, In: Journal of VLSI Signal Processing. 5, 2-3, p. 159-169 11 p.

    Research output: Contribution to journal › Article › Research › peer review

21. Published

    A defect-tolerant systolic array implementation for real time image processing

    Hecht, V., Rönner, K. & Pirsch, P., 1 Jan 1993, In: Journal of VLSI Signal Processing. 5, 1, p. 37-47 11 p.

    Research output: Contribution to journal › Article › Research › peer review

22. Published

    Compact hardware realization for Hough-based extraction of line segments in image sequences for vehicle guidance

    Schoenfeld, J. & Pirsch, P., 1993, Plenary, Special, Audio, Underwater Acoustics, VLSI, Neural Networks. p. I-397-I-400 (Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing; vol. 1).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

23. Published

    Deriving Integrity Maintaining Triggers from Transition Graphs

    Gertz, M. & Lipeck, U. W., 1993, Proceedings of IEEE 9th International Conference on Data Engineering. p. 22-29 8 p.

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

24. Published

    Image processing board for real-time extraction of line symbols from video sequences for AGV

    Schönfeld, J. & Pirsch, P., 1993, Proceedings of IEEE Workshop on VLSI Signal Processing VI, VLSISP 1993. Institute of Electrical and Electronics Engineers Inc., p. 30-38 9 p. 404505. (Proceedings of IEEE Workshop on VLSI Signal Processing VI, VLSISP 1993).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

25. 1989
26. Published

    VLSI architectures for block matching algorithms

    Komarek, T. & Pirsch, P., 1989, In: Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP). 4, p. 2457-2460 4 p.

    Research output: Contribution to journal › Conference article › Research › peer review