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Realization of an in-plane-gate single-electron transistor

Research output: Contribution to journalArticleResearchpeer review

Authors

  • H. Pothier
  • J. Weis
  • R. J. Haug
  • K. V. Klitzing

External Research Organisations

  • Max Planck Institute for Solid State Research (MPI-FKF)
  • Paul-Drude-Institut für Festkörperelektronik (PDI)

Details

Original languageEnglish
Pages (from-to)3174-3176
Number of pages3
JournalApplied physics letters
Volume62
Issue number24
Publication statusPublished - 1 Dec 1993
Externally publishedYes

Abstract

By etching narrow trenches in an AlGaAs/GaAs heterostructure and defining a channel and six in-plane gates in the two-dimensional electron gas, a single-electron transistor is produced in a simple way. As expected from charging effects, the conductivity of the transistor oscillates with the voltage on each gate. However, in contrast to metallic devices or heterostructure devices with metallic top gates, the voltage dependent depletion of the gates themselves leads to changes in the period of the oscillations.

ASJC Scopus subject areas

Cite this

Realization of an in-plane-gate single-electron transistor. / Pothier, H.; Weis, J.; Haug, R. J. et al.
In: Applied physics letters, Vol. 62, No. 24, 01.12.1993, p. 3174-3176.

Research output: Contribution to journalArticleResearchpeer review

Pothier, H, Weis, J, Haug, RJ, Klitzing, KV & Ploog, K 1993, 'Realization of an in-plane-gate single-electron transistor', Applied physics letters, vol. 62, no. 24, pp. 3174-3176. https://doi.org/10.1063/1.109120
Pothier H, Weis J, Haug RJ, Klitzing KV, Ploog K. Realization of an in-plane-gate single-electron transistor. Applied physics letters. 1993 Dec 1;62(24):3174-3176. doi: 10.1063/1.109120
Pothier, H. ; Weis, J. ; Haug, R. J. et al. / Realization of an in-plane-gate single-electron transistor. In: Applied physics letters. 1993 ; Vol. 62, No. 24. pp. 3174-3176.
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