Details
Original language | English |
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Title of host publication | Proceedings |
Subtitle of host publication | 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 |
Pages | 215-221 |
Number of pages | 7 |
Publication status | Published - 2007 |
Event | 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 - Lubeck, Germany Duration: 29 Aug 2007 → 31 Aug 2007 |
Publication series
Name | Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 |
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Abstract
This paper describes a case study in a new rapid prototyping-based design framework for exploring and validating complex multiprocessor architectures for multimedia applications. The goal of the presented methodology is to speed up and improve the verification flow of a multiprocessor system that will finally be implemented as an ASIC. The case study consists of a 64-bit compatible AMBA AHB system bus which connects up to 14 32-Bit RISC processors to a host interface. A typical parallel computing application has been implemented for the parameterized multiprocessor system. The employed FPGA emulation environment increases by up to 200 the simulation frequency of the global system on a workstation (2.2 GHz AMD Dual Opteron with 8 GB RAM). Moreover a stand-alone emulation can be performed at the maximum achievable frequency (65 MHz).
Keywords
- Case study, Design verification and modeling, Emulation, Prototyping
ASJC Scopus subject areas
- Computer Science(all)
- Hardware and Architecture
- Engineering(all)
- Electrical and Electronic Engineering
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Proceedings: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007. 2007. p. 215-221 4341471 (Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - RAPANUI
T2 - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
AU - Payá-Vayá, Guillermo
AU - Martín-Langerwerf, Javier
AU - Pirsch, Peter
PY - 2007
Y1 - 2007
N2 - This paper describes a case study in a new rapid prototyping-based design framework for exploring and validating complex multiprocessor architectures for multimedia applications. The goal of the presented methodology is to speed up and improve the verification flow of a multiprocessor system that will finally be implemented as an ASIC. The case study consists of a 64-bit compatible AMBA AHB system bus which connects up to 14 32-Bit RISC processors to a host interface. A typical parallel computing application has been implemented for the parameterized multiprocessor system. The employed FPGA emulation environment increases by up to 200 the simulation frequency of the global system on a workstation (2.2 GHz AMD Dual Opteron with 8 GB RAM). Moreover a stand-alone emulation can be performed at the maximum achievable frequency (65 MHz).
AB - This paper describes a case study in a new rapid prototyping-based design framework for exploring and validating complex multiprocessor architectures for multimedia applications. The goal of the presented methodology is to speed up and improve the verification flow of a multiprocessor system that will finally be implemented as an ASIC. The case study consists of a 64-bit compatible AMBA AHB system bus which connects up to 14 32-Bit RISC processors to a host interface. A typical parallel computing application has been implemented for the parameterized multiprocessor system. The employed FPGA emulation environment increases by up to 200 the simulation frequency of the global system on a workstation (2.2 GHz AMD Dual Opteron with 8 GB RAM). Moreover a stand-alone emulation can be performed at the maximum achievable frequency (65 MHz).
KW - Case study
KW - Design verification and modeling
KW - Emulation
KW - Prototyping
UR - http://www.scopus.com/inward/record.url?scp=47749152576&partnerID=8YFLogxK
U2 - 10.1109/DSD.2007.4341471
DO - 10.1109/DSD.2007.4341471
M3 - Conference contribution
AN - SCOPUS:47749152576
SN - 076952978X
SN - 9780769529783
T3 - Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
SP - 215
EP - 221
BT - Proceedings
Y2 - 29 August 2007 through 31 August 2007
ER -