Details
| Original language | English |
|---|---|
| Pages (from-to) | 111-120 |
| Number of pages | 10 |
| Journal | ACM SIGPLAN NOTICES |
| Volume | 52 |
| Issue number | 5 |
| Publication status | Published - Jun 2017 |
Abstract
The employment of a real-time operating system (RTOS) in an embedded control systems is often an all-or-nothing decision: While the RTOS-abstractions provide for easier software composition and development, the price in terms of event latencies and memory costs are high. Especially in HW/SW codesign settings, system developers try to avoid the employment of a full-blown RTOS as far as possible. In OSEK-V, we mitigate this trade-off by a very aggressive tailoring of the concrete RTOS instance into the hardware. Instead of implementing generic OS components as custom hardware devices, we capture the actually possible application-kernel interactions as a finite-state machine and integrate the tailored RTOS semantics directly into the processor pipeline. In our experimental results with an OSEK-based implementation of a quadrotor flight controller into the Rocket/RISC-V softcore, we thereby can significantly reduce event latencies, interrupt lock times, and memory footprint at moderate costs in terms of FPGA resources.
Keywords
- Application-specific processor design, Hardware-assisted real-time scheduling, OSEK
ASJC Scopus subject areas
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In: ACM SIGPLAN NOTICES, Vol. 52, No. 5, 06.2017, p. 111-120.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - OSEK-V: Application-Specific RTOS Instantiation in Hardware
AU - Dietrich, Christian
AU - Lohmann, Daniel
N1 - Funding Information: The authors thank the anonymous reviewers for their feedback. This work has been supported by the German Research Foundation (DFG) under the grants no. LO 1719/1-3, SFB/Transregio 89 “Invasive Computing” (Project C1), and LO 1719/4-1. Funding Information: The authors thank the anonymous reviewers for their feedback. This work has been supported by the German Research Foundation (DFG) under the grants no. LO 1719/1-3, SFB/Transregio 89 "Invasive Computing" (Project C1), and LO 1719/4-1. Publisher Copyright: © 2017 ACM. Copyright: Copyright 2020 Elsevier B.V., All rights reserved.
PY - 2017/6
Y1 - 2017/6
N2 - The employment of a real-time operating system (RTOS) in an embedded control systems is often an all-or-nothing decision: While the RTOS-abstractions provide for easier software composition and development, the price in terms of event latencies and memory costs are high. Especially in HW/SW codesign settings, system developers try to avoid the employment of a full-blown RTOS as far as possible. In OSEK-V, we mitigate this trade-off by a very aggressive tailoring of the concrete RTOS instance into the hardware. Instead of implementing generic OS components as custom hardware devices, we capture the actually possible application-kernel interactions as a finite-state machine and integrate the tailored RTOS semantics directly into the processor pipeline. In our experimental results with an OSEK-based implementation of a quadrotor flight controller into the Rocket/RISC-V softcore, we thereby can significantly reduce event latencies, interrupt lock times, and memory footprint at moderate costs in terms of FPGA resources.
AB - The employment of a real-time operating system (RTOS) in an embedded control systems is often an all-or-nothing decision: While the RTOS-abstractions provide for easier software composition and development, the price in terms of event latencies and memory costs are high. Especially in HW/SW codesign settings, system developers try to avoid the employment of a full-blown RTOS as far as possible. In OSEK-V, we mitigate this trade-off by a very aggressive tailoring of the concrete RTOS instance into the hardware. Instead of implementing generic OS components as custom hardware devices, we capture the actually possible application-kernel interactions as a finite-state machine and integrate the tailored RTOS semantics directly into the processor pipeline. In our experimental results with an OSEK-based implementation of a quadrotor flight controller into the Rocket/RISC-V softcore, we thereby can significantly reduce event latencies, interrupt lock times, and memory footprint at moderate costs in terms of FPGA resources.
KW - Application-specific processor design
KW - Hardware-assisted real-time scheduling
KW - OSEK
UR - http://www.scopus.com/inward/record.url?scp=85084646717&partnerID=8YFLogxK
U2 - 10.1145/3078633.3081030
DO - 10.1145/3078633.3081030
M3 - Article
AN - SCOPUS:85084646717
VL - 52
SP - 111
EP - 120
JO - ACM SIGPLAN NOTICES
JF - ACM SIGPLAN NOTICES
SN - 1523-2867
IS - 5
ER -