Details
| Original language | English |
|---|---|
| Pages | 25-34 |
| Number of pages | 10 |
| Publication status | Published - 1996 |
| Event | 1996 9th IEEE Workshop on VLSI Signal Processing - San Francisco, CA, USA Duration: 30 Oct 1996 → 1 Nov 1996 |
Conference
| Conference | 1996 9th IEEE Workshop on VLSI Signal Processing |
|---|---|
| City | San Francisco, CA, USA |
| Period | 30 Oct 1996 → 1 Nov 1996 |
Abstract
The paper describes principle and practical implementation of an object based cache concept, allowing conflict free regular access to data structures for a cluster of processing units. The cache is based on a virtual object bound address space instead of the conventional linear address space for the access to shared data located in on-chip caches. By extending the conventional block based cache principle to 2-D blocks and using virtual addresses for address arithmetic and hit/miss detection, the time critical address calculations in the load/store pipeline can be performed fast and at low hardware cost. Transform to physical addresses is performed during block transfer between internal caches and external system memory, where it is much less time critical and must only be performed once per block. The object based cache is compiler friendly, fully transparent to the programmer, and allows the hardware efficient implementation of a shared on-chip memory system for future parallel digital image processors.
ASJC Scopus subject areas
- Computer Science(all)
- Signal Processing
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1996. 25-34 Paper presented at 1996 9th IEEE Workshop on VLSI Signal Processing, San Francisco, CA, USA.
Research output: Contribution to conference › Paper › Research › peer review
}
TY - CONF
T1 - Object based data cache with conflict free concurrent access as shared memory for a parallel DSP
AU - Kneip, J.
AU - Pirsch, P.
PY - 1996
Y1 - 1996
N2 - The paper describes principle and practical implementation of an object based cache concept, allowing conflict free regular access to data structures for a cluster of processing units. The cache is based on a virtual object bound address space instead of the conventional linear address space for the access to shared data located in on-chip caches. By extending the conventional block based cache principle to 2-D blocks and using virtual addresses for address arithmetic and hit/miss detection, the time critical address calculations in the load/store pipeline can be performed fast and at low hardware cost. Transform to physical addresses is performed during block transfer between internal caches and external system memory, where it is much less time critical and must only be performed once per block. The object based cache is compiler friendly, fully transparent to the programmer, and allows the hardware efficient implementation of a shared on-chip memory system for future parallel digital image processors.
AB - The paper describes principle and practical implementation of an object based cache concept, allowing conflict free regular access to data structures for a cluster of processing units. The cache is based on a virtual object bound address space instead of the conventional linear address space for the access to shared data located in on-chip caches. By extending the conventional block based cache principle to 2-D blocks and using virtual addresses for address arithmetic and hit/miss detection, the time critical address calculations in the load/store pipeline can be performed fast and at low hardware cost. Transform to physical addresses is performed during block transfer between internal caches and external system memory, where it is much less time critical and must only be performed once per block. The object based cache is compiler friendly, fully transparent to the programmer, and allows the hardware efficient implementation of a shared on-chip memory system for future parallel digital image processors.
UR - http://www.scopus.com/inward/record.url?scp=0030378890&partnerID=8YFLogxK
M3 - Paper
AN - SCOPUS:0030378890
SP - 25
EP - 34
T2 - 1996 9th IEEE Workshop on VLSI Signal Processing
Y2 - 30 October 1996 through 1 November 1996
ER -