Details
| Original language | English |
|---|---|
| Pages (from-to) | 221-230 |
| Number of pages | 10 |
| Journal | IEEE Transactions on Circuits and Systems for Video Technology |
| Volume | 2 |
| Issue number | 2 |
| Publication status | Published - Jun 1992 |
Abstract
This contribution discusses the performance of multiprocessor architectures to be applied for video coding algorithms. SIMD, SIMD cluster, and MIMD architectures are studied by a unified performance approach under specific constraints of video coding algorithms. The proposed performance model considers communication and computation times as well as the required silicon area. MIMD architectures are compared to SIMD with regard to their performance. The optimization of architectural parameters for SIMD and MIMD architectures is discussed. It is shown how the proposed performance model can be applied to the design of VLSI-based multiprocessor systems for video coding.
ASJC Scopus subject areas
- Engineering(all)
- Media Technology
- Engineering(all)
- Electrical and Electronic Engineering
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In: IEEE Transactions on Circuits and Systems for Video Technology, Vol. 2, No. 2, 06.1992, p. 221-230.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - Multiprocessor Performance for Real-Time Processing of Video Coding Applications
AU - Jeschke, Hartwig
AU - Gaedke, Klaus
AU - Pirsch, Peter
PY - 1992/6
Y1 - 1992/6
N2 - This contribution discusses the performance of multiprocessor architectures to be applied for video coding algorithms. SIMD, SIMD cluster, and MIMD architectures are studied by a unified performance approach under specific constraints of video coding algorithms. The proposed performance model considers communication and computation times as well as the required silicon area. MIMD architectures are compared to SIMD with regard to their performance. The optimization of architectural parameters for SIMD and MIMD architectures is discussed. It is shown how the proposed performance model can be applied to the design of VLSI-based multiprocessor systems for video coding.
AB - This contribution discusses the performance of multiprocessor architectures to be applied for video coding algorithms. SIMD, SIMD cluster, and MIMD architectures are studied by a unified performance approach under specific constraints of video coding algorithms. The proposed performance model considers communication and computation times as well as the required silicon area. MIMD architectures are compared to SIMD with regard to their performance. The optimization of architectural parameters for SIMD and MIMD architectures is discussed. It is shown how the proposed performance model can be applied to the design of VLSI-based multiprocessor systems for video coding.
UR - http://www.scopus.com/inward/record.url?scp=0026882316&partnerID=8YFLogxK
U2 - 10.1109/76.143421
DO - 10.1109/76.143421
M3 - Article
AN - SCOPUS:0026882316
VL - 2
SP - 221
EP - 230
JO - IEEE Transactions on Circuits and Systems for Video Technology
JF - IEEE Transactions on Circuits and Systems for Video Technology
SN - 1051-8215
IS - 2
ER -