Details
| Original language | English |
|---|---|
| Title of host publication | EFTA 2003. 2003 IEEE Conference on Emerging Technologies and Factory Automation. Proceedings (Cat. No.03TH8696) |
| Pages | 153-156 |
| Number of pages | 4 |
| Publication status | Published - 2003 |
| Event | 2003 IEEE Conference on Emerging Technologies and Factory Automation, ETFA 2003 - Lisbon, Portugal Duration: 16 Sept 2003 → 19 Sept 2003 |
Publication series
| Name | IEEE International Conference on Emerging Technologies and Factory Automation, ETFA |
|---|---|
| ISSN (Print) | 1946-0740 |
Abstract
Most studies employing Petri nets in semiconductor manufacturing model only one specific area (e.g. etching) in detail, and model the rest of the manufacturing process, e.g. by abstract input/output behavior. In our study, we show the feasibility of using Petri nets for modeling the complete production process. We use the first set of test data provided by the MASM-LAB, Arizona State University. It is a process of a two-product system making non-volatile memory chips. For modeling, we use our own tool PSim, which is based on a combined queuing and Petri net formalism. The integration of queues makes the modeling of parts waiting in front of a machine quite concise and intuitive. PSim offers a hierarchical and modular modeling approach, which is especially feasible for large and complex systems. We use the modular approach by once defining the structure of a machine as Petri net and then instantiating as many machines as needed. Then we model the operators, resources and the movement of parts between the machines as specified in the production plan. As a result, we can state that Petri nets are feasible for modeling a complete semiconductor manufacturing process.
ASJC Scopus subject areas
- Engineering(all)
- Electrical and Electronic Engineering
- Engineering(all)
- Control and Systems Engineering
- Engineering(all)
- Industrial and Manufacturing Engineering
- Computer Science(all)
- Computer Science Applications
Cite this
- Standard
- Harvard
- Apa
- Vancouver
- BibTeX
- RIS
EFTA 2003. 2003 IEEE Conference on Emerging Technologies and Factory Automation. Proceedings (Cat. No.03TH8696). 2003. p. 153-156 (IEEE International Conference on Emerging Technologies and Factory Automation, ETFA).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Modeling and simulation of a complete semiconductor manufacturing facility using Petri nets
AU - Becker, Matthias
N1 - Publisher Copyright: © 2003 IEEE.
PY - 2003
Y1 - 2003
N2 - Most studies employing Petri nets in semiconductor manufacturing model only one specific area (e.g. etching) in detail, and model the rest of the manufacturing process, e.g. by abstract input/output behavior. In our study, we show the feasibility of using Petri nets for modeling the complete production process. We use the first set of test data provided by the MASM-LAB, Arizona State University. It is a process of a two-product system making non-volatile memory chips. For modeling, we use our own tool PSim, which is based on a combined queuing and Petri net formalism. The integration of queues makes the modeling of parts waiting in front of a machine quite concise and intuitive. PSim offers a hierarchical and modular modeling approach, which is especially feasible for large and complex systems. We use the modular approach by once defining the structure of a machine as Petri net and then instantiating as many machines as needed. Then we model the operators, resources and the movement of parts between the machines as specified in the production plan. As a result, we can state that Petri nets are feasible for modeling a complete semiconductor manufacturing process.
AB - Most studies employing Petri nets in semiconductor manufacturing model only one specific area (e.g. etching) in detail, and model the rest of the manufacturing process, e.g. by abstract input/output behavior. In our study, we show the feasibility of using Petri nets for modeling the complete production process. We use the first set of test data provided by the MASM-LAB, Arizona State University. It is a process of a two-product system making non-volatile memory chips. For modeling, we use our own tool PSim, which is based on a combined queuing and Petri net formalism. The integration of queues makes the modeling of parts waiting in front of a machine quite concise and intuitive. PSim offers a hierarchical and modular modeling approach, which is especially feasible for large and complex systems. We use the modular approach by once defining the structure of a machine as Petri net and then instantiating as many machines as needed. Then we model the operators, resources and the movement of parts between the machines as specified in the production plan. As a result, we can state that Petri nets are feasible for modeling a complete semiconductor manufacturing process.
UR - http://www.scopus.com/inward/record.url?scp=58049167290&partnerID=8YFLogxK
U2 - 10.1109/ETFA.2003.1248687
DO - 10.1109/ETFA.2003.1248687
M3 - Conference contribution
AN - SCOPUS:58049167290
SN - 0-7803-7937-3
T3 - IEEE International Conference on Emerging Technologies and Factory Automation, ETFA
SP - 153
EP - 156
BT - EFTA 2003. 2003 IEEE Conference on Emerging Technologies and Factory Automation. Proceedings (Cat. No.03TH8696)
T2 - 2003 IEEE Conference on Emerging Technologies and Factory Automation, ETFA 2003
Y2 - 16 September 2003 through 19 September 2003
ER -