Details
| Original language | English |
|---|---|
| Pages (from-to) | 152-159 |
| Number of pages | 8 |
| Journal | IEEE Transactions on Advanced Packaging |
| Volume | 28 |
| Issue number | 2 |
| Publication status | Published - May 2005 |
Abstract
The impact of the ground line position on the line parameters of signal interconnects built in a 110-nm CMOS technology is investigated in the presence of a conductive substrate. Characteristic line parameters obtained from simulations are validated with two-port network analyzer measurements of specially designed test structures in a frequency range up to 50 GHz. In addition, the influence of the ground line position on time-domain signals in product-related bus systems is explored. It is shown that the impact of substrate effects on the line parameters, and consequently on the signal shape in the time domain, strongly depends on the relative position of the ground line with respect to the signal lines and, as expected, on the length of the line system. We show that for short on-chip bus systems (shorter than 2 mm), the influence of the ground line positioning on time-domain signals is negligible. However, for long bus systems (e.g., 5 mm), this influence becomes significant and can no longer be neglected.
Keywords
- 110-nm CMOS technology, Parameter extraction, Proximity effect, S-parameter measurement, Signal integrity, Substrate effects, Time-domain simulations
ASJC Scopus subject areas
- Engineering(all)
- Electrical and Electronic Engineering
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In: IEEE Transactions on Advanced Packaging, Vol. 28, No. 2, 05.2005, p. 152-159.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - Influence of the ground line position on the signal integrity of product-related interconnects in the frequency and time domain
AU - Ktata, M. Faïez
AU - Arz, Uwe
AU - Grabinski, Hartmut
AU - Fischer, Helmut
PY - 2005/5
Y1 - 2005/5
N2 - The impact of the ground line position on the line parameters of signal interconnects built in a 110-nm CMOS technology is investigated in the presence of a conductive substrate. Characteristic line parameters obtained from simulations are validated with two-port network analyzer measurements of specially designed test structures in a frequency range up to 50 GHz. In addition, the influence of the ground line position on time-domain signals in product-related bus systems is explored. It is shown that the impact of substrate effects on the line parameters, and consequently on the signal shape in the time domain, strongly depends on the relative position of the ground line with respect to the signal lines and, as expected, on the length of the line system. We show that for short on-chip bus systems (shorter than 2 mm), the influence of the ground line positioning on time-domain signals is negligible. However, for long bus systems (e.g., 5 mm), this influence becomes significant and can no longer be neglected.
AB - The impact of the ground line position on the line parameters of signal interconnects built in a 110-nm CMOS technology is investigated in the presence of a conductive substrate. Characteristic line parameters obtained from simulations are validated with two-port network analyzer measurements of specially designed test structures in a frequency range up to 50 GHz. In addition, the influence of the ground line position on time-domain signals in product-related bus systems is explored. It is shown that the impact of substrate effects on the line parameters, and consequently on the signal shape in the time domain, strongly depends on the relative position of the ground line with respect to the signal lines and, as expected, on the length of the line system. We show that for short on-chip bus systems (shorter than 2 mm), the influence of the ground line positioning on time-domain signals is negligible. However, for long bus systems (e.g., 5 mm), this influence becomes significant and can no longer be neglected.
KW - 110-nm CMOS technology
KW - Parameter extraction
KW - Proximity effect
KW - S-parameter measurement
KW - Signal integrity
KW - Substrate effects
KW - Time-domain simulations
UR - http://www.scopus.com/inward/record.url?scp=20344385018&partnerID=8YFLogxK
U2 - 10.1109/TADVP.2005.846946
DO - 10.1109/TADVP.2005.846946
M3 - Article
AN - SCOPUS:20344385018
VL - 28
SP - 152
EP - 159
JO - IEEE Transactions on Advanced Packaging
JF - IEEE Transactions on Advanced Packaging
SN - 1521-3323
IS - 2
ER -