Details
Original language | English |
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Pages | 2319-2321 |
Number of pages | 3 |
Publication status | Published - 2000 |
Event | 2000 Intenational Geoscience and Remote Sensing Symposium (IGARSS 2000) - Honolulu, HI, USA Duration: 24 Jul 2000 → 28 Jul 2000 |
Conference
Conference | 2000 Intenational Geoscience and Remote Sensing Symposium (IGARSS 2000) |
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City | Honolulu, HI, USA |
Period | 24 Jul 2000 → 28 Jul 2000 |
Abstract
In this paper we present the HiPAR-DSP 16, a parallel and programmable architecture which is adapted to the demands of SAR image processing. To provide a high FFT performance, the HiPAR-DSP 16 features an array of 16 parallel processing units. Efficient data exchange between the processing units can be done by a shared memory with concurrent access. The HiPAR-DSP 16 is able to perform a range compression of 2100 lines (4 k complex samples) per second. Therefore the HiPAR-DSP is one of the enabling technologies for onboard real-time processing of SAR images.
ASJC Scopus subject areas
- Computer Science(all)
- Computer Science Applications
- Earth and Planetary Sciences(all)
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2000. 2319-2321 Paper presented at 2000 Intenational Geoscience and Remote Sensing Symposium (IGARSS 2000), Honolulu, HI, USA.
Research output: Contribution to conference › Paper › Research › peer review
}
TY - CONF
T1 - HiPAR-DSP 16
T2 - 2000 Intenational Geoscience and Remote Sensing Symposium (IGARSS 2000)
AU - Kloos, H.
AU - Wittenburg, J. P.
AU - Hinrichs, W.
AU - Lieske, H.
AU - Friebe, L.
AU - Pirsch, P.
PY - 2000
Y1 - 2000
N2 - In this paper we present the HiPAR-DSP 16, a parallel and programmable architecture which is adapted to the demands of SAR image processing. To provide a high FFT performance, the HiPAR-DSP 16 features an array of 16 parallel processing units. Efficient data exchange between the processing units can be done by a shared memory with concurrent access. The HiPAR-DSP 16 is able to perform a range compression of 2100 lines (4 k complex samples) per second. Therefore the HiPAR-DSP is one of the enabling technologies for onboard real-time processing of SAR images.
AB - In this paper we present the HiPAR-DSP 16, a parallel and programmable architecture which is adapted to the demands of SAR image processing. To provide a high FFT performance, the HiPAR-DSP 16 features an array of 16 parallel processing units. Efficient data exchange between the processing units can be done by a shared memory with concurrent access. The HiPAR-DSP 16 is able to perform a range compression of 2100 lines (4 k complex samples) per second. Therefore the HiPAR-DSP is one of the enabling technologies for onboard real-time processing of SAR images.
UR - http://www.scopus.com/inward/record.url?scp=0034548177&partnerID=8YFLogxK
M3 - Paper
AN - SCOPUS:0034548177
SP - 2319
EP - 2321
Y2 - 24 July 2000 through 28 July 2000
ER -