Details
| Original language | English |
|---|---|
| Article number | 1253797 |
| Pages (from-to) | 8-13 |
| Number of pages | 6 |
| Journal | Proceedings -Design, Automation and Test in Europe, DATE |
| Publication status | Published - 2003 |
| Event | Design, Automation and Test in Europe Conference and Exhibition, DATE 2003 - Munich, Germany Duration: 3 Mar 2003 → 7 Mar 2003 |
Abstract
The HiBRID-SoC multi-core system-on-chip targets a wide range of application fields with particularly high processing demands, including general signal processing applications, video and audio de-/encoding, and a combination of these tasks. For this purpose, the HiBRID-SoC integrates three fully programmable processors cores and various interfaces onto a single chip, all tied to a 64 bit AMBA AHB bus. The processor cores are individually optimized to the particular computational characteristics of different application fields, complementing each other to deliver high performance levels with high flexibility at reduced system cost. The HiBRID-SoC is fabricated in a 0.18 μm 6LM standard-cell CMOS technology, occupies about 82 mm2, and operates at 145 MHz.
ASJC Scopus subject areas
- Engineering(all)
- General Engineering
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In: Proceedings -Design, Automation and Test in Europe, DATE, 2003, p. 8-13.
Research output: Contribution to journal › Conference article › Research › peer review
}
TY - JOUR
T1 - HiBRID-SoC
T2 - Design, Automation and Test in Europe Conference and Exhibition, DATE 2003
AU - Stolberg, Hans Joachim
AU - Berekovic, Mladen
AU - Friebe, Lars
AU - Moch, Sören
AU - Flugel, Sebastian
AU - Mao, Xun
AU - Kulaczewski, Mark B.
AU - Klubmann, Heiko
AU - Pirsch, Peter
PY - 2003
Y1 - 2003
N2 - The HiBRID-SoC multi-core system-on-chip targets a wide range of application fields with particularly high processing demands, including general signal processing applications, video and audio de-/encoding, and a combination of these tasks. For this purpose, the HiBRID-SoC integrates three fully programmable processors cores and various interfaces onto a single chip, all tied to a 64 bit AMBA AHB bus. The processor cores are individually optimized to the particular computational characteristics of different application fields, complementing each other to deliver high performance levels with high flexibility at reduced system cost. The HiBRID-SoC is fabricated in a 0.18 μm 6LM standard-cell CMOS technology, occupies about 82 mm2, and operates at 145 MHz.
AB - The HiBRID-SoC multi-core system-on-chip targets a wide range of application fields with particularly high processing demands, including general signal processing applications, video and audio de-/encoding, and a combination of these tasks. For this purpose, the HiBRID-SoC integrates three fully programmable processors cores and various interfaces onto a single chip, all tied to a 64 bit AMBA AHB bus. The processor cores are individually optimized to the particular computational characteristics of different application fields, complementing each other to deliver high performance levels with high flexibility at reduced system cost. The HiBRID-SoC is fabricated in a 0.18 μm 6LM standard-cell CMOS technology, occupies about 82 mm2, and operates at 145 MHz.
UR - http://www.scopus.com/inward/record.url?scp=33645990746&partnerID=8YFLogxK
U2 - 10.1109/DATE.2003.1253797
DO - 10.1109/DATE.2003.1253797
M3 - Conference article
AN - SCOPUS:33645990746
SP - 8
EP - 13
JO - Proceedings -Design, Automation and Test in Europe, DATE
JF - Proceedings -Design, Automation and Test in Europe, DATE
SN - 1530-1591
M1 - 1253797
Y2 - 3 March 2003 through 7 March 2003
ER -