Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

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Original languageEnglish
Title of host publicationProceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing
Subtitle of host publicationDASIP
EditorsSophie Cerisier, Adam Morawiec
PublisherIEEE Computer Society
ISBN (electronic)9791092279108
Publication statusPublished - 4 Jan 2016
Event2015 Conference on Design and Architectures for Signal and Image Processing, DASIP - Cracow, Poland
Duration: 23 Sept 2015 → 25 Sept 2015

Keywords

    Emulation, Estimation, Field programmable gate arrays, Hardware, Power demand, Program processors, Registers

ASJC Scopus subject areas

Cite this

Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation. / Hesselbarth, Sebastian; Schewior, Gregor; Blume, Holger.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing: DASIP . ed. / Sophie Cerisier; Adam Morawiec. IEEE Computer Society, 2016.

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Hesselbarth, S, Schewior, G & Blume, H 2016, Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation. in S Cerisier & A Morawiec (eds), Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing: DASIP . IEEE Computer Society, 2015 Conference on Design and Architectures for Signal and Image Processing, DASIP , Cracow, Poland, 23 Sept 2015. https://doi.org/10.1109/DASIP.2015.7367249
Hesselbarth, S., Schewior, G., & Blume, H. (2016). Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation. In S. Cerisier, & A. Morawiec (Eds.), Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing: DASIP IEEE Computer Society. https://doi.org/10.1109/DASIP.2015.7367249
Hesselbarth S, Schewior G, Blume H. Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation. In Cerisier S, Morawiec A, editors, Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing: DASIP . IEEE Computer Society. 2016 doi: 10.1109/DASIP.2015.7367249
Hesselbarth, Sebastian ; Schewior, Gregor ; Blume, Holger. / Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation. Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing: DASIP . editor / Sophie Cerisier ; Adam Morawiec. IEEE Computer Society, 2016.
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