Details
Original language | English |
---|---|
Pages (from-to) | 117-126 |
Number of pages | 10 |
Journal | Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology |
Volume | 31 |
Issue number | 2 |
Publication status | Published - Jun 2002 |
Externally published | Yes |
Abstract
The computational power required in many multimedia applications is well beyond the capabilities of today's multimedia systems. Therefore, the embedding of additional high-performance accelerator multimedia components into these systems is most decisive. This paper presents the embedding of multimedia components into computer systems using reconfigurable coprocessor boards. The goal of those reconfigurable platforms which can be adapted to several applications and which include programmable digital signal processors, control and memory devices as well as dedicated multimedia ASICs is worked out. On the way to such a platform four ASICs for image and text processing are presented. The embedding of these components into a computing system using a CardBus-based coprocessor board is shown. Such a reconfigurable coprocessor board is an important intermediate stage on the way to future hybrid reconfigurable systems on chip.
Keywords
- CardBus, Coprocessor board, Dedicated ASICs, Heterogeneous reconfigurable systems, Multimedia applications, Text search
ASJC Scopus subject areas
- Computer Science(all)
- Signal Processing
- Computer Science(all)
- Information Systems
- Engineering(all)
- Electrical and Electronic Engineering
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In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 31, No. 2, 06.2002, p. 117-126.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - Embedding of Dedicated High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality
AU - Blume, Holger
AU - Blüthgen, Hans Martin
AU - Henning, Christiane
AU - Osterloh, Patrick
AU - Noll, Tobias G.
N1 - Funding information: This work was partially funded by the government of the state of NRW (North Rhine-Westphalia) in the project IVA 3-107 027 96.
PY - 2002/6
Y1 - 2002/6
N2 - The computational power required in many multimedia applications is well beyond the capabilities of today's multimedia systems. Therefore, the embedding of additional high-performance accelerator multimedia components into these systems is most decisive. This paper presents the embedding of multimedia components into computer systems using reconfigurable coprocessor boards. The goal of those reconfigurable platforms which can be adapted to several applications and which include programmable digital signal processors, control and memory devices as well as dedicated multimedia ASICs is worked out. On the way to such a platform four ASICs for image and text processing are presented. The embedding of these components into a computing system using a CardBus-based coprocessor board is shown. Such a reconfigurable coprocessor board is an important intermediate stage on the way to future hybrid reconfigurable systems on chip.
AB - The computational power required in many multimedia applications is well beyond the capabilities of today's multimedia systems. Therefore, the embedding of additional high-performance accelerator multimedia components into these systems is most decisive. This paper presents the embedding of multimedia components into computer systems using reconfigurable coprocessor boards. The goal of those reconfigurable platforms which can be adapted to several applications and which include programmable digital signal processors, control and memory devices as well as dedicated multimedia ASICs is worked out. On the way to such a platform four ASICs for image and text processing are presented. The embedding of these components into a computing system using a CardBus-based coprocessor board is shown. Such a reconfigurable coprocessor board is an important intermediate stage on the way to future hybrid reconfigurable systems on chip.
KW - CardBus
KW - Coprocessor board
KW - Dedicated ASICs
KW - Heterogeneous reconfigurable systems
KW - Multimedia applications
KW - Text search
UR - http://www.scopus.com/inward/record.url?scp=0036602965&partnerID=8YFLogxK
U2 - 10.1023/A:1015389221355
DO - 10.1023/A:1015389221355
M3 - Article
AN - SCOPUS:0036602965
VL - 31
SP - 117
EP - 126
JO - Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology
JF - Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology
SN - 1387-5485
IS - 2
ER -