Details
Original language | English |
---|---|
Pages | 1102-1111 |
Number of pages | 10 |
Publication status | Published - 2016 |
Abstract
Analog-/Mixed-Signal (AMS) design verification is one of the most challenging and time consuming tasks of todays complex system on chip (SoC) designs. In contrast to digital system design, AMS designers have to deal with a continuous state space of conservative quantities, highly nonlinear relationships, non-functional influences, etc. enlarging the number of possibly critical scenarios to infinity. In this special session we demonstrate the verification of functional properties using simulative and formal methods. We combine different approaches including automated abstraction and refinement of mixed-level models, state-space discretization as well as affine arithmetic. To reach sufficient verification coverage with reasonable time and effort, we use enhanced simulation schemes to avoid conventional simulation drawbacks.
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2016. 1102-1111.
Research output: Contribution to conference › Paper › Research › peer review
}
TY - CONF
T1 - Embedded tutorial - Analog-/mixed-signal verification methods for AMS coverage analysis.
AU - Barke, Erich
AU - Fürtig, Andreas
AU - Gläser, Georg
AU - Grimm, Christoph
AU - Hedrich, Lars
AU - Heinen, Stefan
AU - Hennig, Eckhard
AU - Lee, Hyun-Sek Lukas
AU - Nebel, Wolfgang
AU - Nitsche, Gregor
AU - Olbrich, Markus
AU - Radojicic, Carna
AU - Speicher, Fabian
N1 - Publisher Copyright: © 2016 EDAA.
PY - 2016
Y1 - 2016
N2 - Analog-/Mixed-Signal (AMS) design verification is one of the most challenging and time consuming tasks of todays complex system on chip (SoC) designs. In contrast to digital system design, AMS designers have to deal with a continuous state space of conservative quantities, highly nonlinear relationships, non-functional influences, etc. enlarging the number of possibly critical scenarios to infinity. In this special session we demonstrate the verification of functional properties using simulative and formal methods. We combine different approaches including automated abstraction and refinement of mixed-level models, state-space discretization as well as affine arithmetic. To reach sufficient verification coverage with reasonable time and effort, we use enhanced simulation schemes to avoid conventional simulation drawbacks.
AB - Analog-/Mixed-Signal (AMS) design verification is one of the most challenging and time consuming tasks of todays complex system on chip (SoC) designs. In contrast to digital system design, AMS designers have to deal with a continuous state space of conservative quantities, highly nonlinear relationships, non-functional influences, etc. enlarging the number of possibly critical scenarios to infinity. In this special session we demonstrate the verification of functional properties using simulative and formal methods. We combine different approaches including automated abstraction and refinement of mixed-level models, state-space discretization as well as affine arithmetic. To reach sufficient verification coverage with reasonable time and effort, we use enhanced simulation schemes to avoid conventional simulation drawbacks.
UR - http://www.scopus.com/inward/record.url?scp=84973621392&partnerID=8YFLogxK
M3 - Paper
SP - 1102
EP - 1111
ER -