Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture

Research output: Chapter in book/report/conference proceedingConference contributionResearchpeer review

Authors

  • S. Nolting
  • G. Payá-Vayá
  • F. Giesemann
  • H. Blume
  • S. Niemann
  • C. Müeller-Schloer
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Details

Original languageEnglish
Title of host publication2016 IEEE 30th International Parallel and Distributed Processing Symposium
Subtitle of host publicationProgram & Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages172-180
Number of pages9
ISBN (electronic)9781509021406
ISBN (print)978-1-5090-3683-7
Publication statusPublished - 4 Aug 2016
Event2016 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2016 - Chicago, United States
Duration: 23 May 201627 May 2016
Conference number: 30

Keywords

    FPGA, Organic Computing, Reconfigurable Processor

ASJC Scopus subject areas

Cite this

Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture. / Nolting, S.; Payá-Vayá, G.; Giesemann, F. et al.
2016 IEEE 30th International Parallel and Distributed Processing Symposium: Program & Proceedings. Institute of Electrical and Electronics Engineers Inc., 2016. p. 172-180.

Research output: Chapter in book/report/conference proceedingConference contributionResearchpeer review

Nolting, S, Payá-Vayá, G, Giesemann, F, Blume, H, Niemann, S & Müeller-Schloer, C 2016, Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture. in 2016 IEEE 30th International Parallel and Distributed Processing Symposium: Program & Proceedings. Institute of Electrical and Electronics Engineers Inc., pp. 172-180, 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2016, Chicago, United States, 23 May 2016. https://doi.org/10.1109/IPDPSW.2016.158
Nolting, S., Payá-Vayá, G., Giesemann, F., Blume, H., Niemann, S., & Müeller-Schloer, C. (2016). Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture. In 2016 IEEE 30th International Parallel and Distributed Processing Symposium: Program & Proceedings (pp. 172-180). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPDPSW.2016.158
Nolting S, Payá-Vayá G, Giesemann F, Blume H, Niemann S, Müeller-Schloer C. Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture. In 2016 IEEE 30th International Parallel and Distributed Processing Symposium: Program & Proceedings. Institute of Electrical and Electronics Engineers Inc. 2016. p. 172-180 doi: 10.1109/IPDPSW.2016.158
Nolting, S. ; Payá-Vayá, G. ; Giesemann, F. et al. / Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture. 2016 IEEE 30th International Parallel and Distributed Processing Symposium: Program & Proceedings. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 172-180
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@inproceedings{c8b1630528214f32bbbba01cf75b84df,
title = "Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture",
keywords = "FPGA, Organic Computing, Reconfigurable Processor",
author = "S. Nolting and G. Pay{\'a}-Vay{\'a} and F. Giesemann and H. Blume and S. Niemann and C. M{\"u}eller-Schloer",
year = "2016",
month = aug,
day = "4",
doi = "10.1109/IPDPSW.2016.158",
language = "English",
isbn = "978-1-5090-3683-7",
pages = "172--180",
booktitle = "2016 IEEE 30th International Parallel and Distributed Processing Symposium",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
address = "United States",
note = "2016 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2016 ; Conference date: 23-05-2016 Through 27-05-2016",

}

Download

TY - GEN

T1 - Dynamic Self-Reconfiguration of a MIPS-Based Soft-Processor Architecture

AU - Nolting, S.

AU - Payá-Vayá, G.

AU - Giesemann, F.

AU - Blume, H.

AU - Niemann, S.

AU - Müeller-Schloer, C.

N1 - Conference code: 30

PY - 2016/8/4

Y1 - 2016/8/4

KW - FPGA

KW - Organic Computing

KW - Reconfigurable Processor

UR - http://www.scopus.com/inward/record.url?scp=84991660822&partnerID=8YFLogxK

U2 - 10.1109/IPDPSW.2016.158

DO - 10.1109/IPDPSW.2016.158

M3 - Conference contribution

AN - SCOPUS:84991660822

SN - 978-1-5090-3683-7

SP - 172

EP - 180

BT - 2016 IEEE 30th International Parallel and Distributed Processing Symposium

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2016

Y2 - 23 May 2016 through 27 May 2016

ER -

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