Details
| Original language | English |
|---|---|
| Pages | 1151-1154 |
| Number of pages | 4 |
| Publication status | Published - 1996 |
| Event | 1996 3rd IEEE International Conference on Electronics, Circuits, and Systems, ICECS. Part 2 (of 2) - Rodos, Greece Duration: 13 Oct 1996 → 16 Oct 1996 |
Conference
| Conference | 1996 3rd IEEE International Conference on Electronics, Circuits, and Systems, ICECS. Part 2 (of 2) |
|---|---|
| City | Rodos, Greece |
| Period | 13 Oct 1996 → 16 Oct 1996 |
Abstract
A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip multiprocessor array MAXPE9 which integrates 9 programmable video signal processing elements AxPe on a silicon area of 16 cm2. Each AxPe has a peak arithmetic performance of 1 GOPS. In order to demonstrate the computational power of the MAXPE9 for video coding schemes in multimedia applications, an universal hardware platform based on a personal computer and software tools have been developed. It allows an efficient programming of the MAXPE9 including an immediate verification on hardware. Examples of video coding schemes to be investigated are hybrid coding according to ITU-T H.261, H.263 or ISO MPEG 1/2.
ASJC Scopus subject areas
- Engineering(all)
- General Engineering
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1996. 1151-1154 Paper presented at 1996 3rd IEEE International Conference on Electronics, Circuits, and Systems, ICECS. Part 2 (of 2), Rodos, Greece.
Research output: Contribution to conference › Paper › Research › peer review
}
TY - CONF
T1 - Design of a development system for multimedia applications based on a single chip multiprocessor array
AU - Herrmann, Klaus
AU - Gaedke, Klaus
AU - Hilgenstock, Joerg
AU - Pirsch, Peter
PY - 1996
Y1 - 1996
N2 - A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip multiprocessor array MAXPE9 which integrates 9 programmable video signal processing elements AxPe on a silicon area of 16 cm2. Each AxPe has a peak arithmetic performance of 1 GOPS. In order to demonstrate the computational power of the MAXPE9 for video coding schemes in multimedia applications, an universal hardware platform based on a personal computer and software tools have been developed. It allows an efficient programming of the MAXPE9 including an immediate verification on hardware. Examples of video coding schemes to be investigated are hybrid coding according to ITU-T H.261, H.263 or ISO MPEG 1/2.
AB - A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip multiprocessor array MAXPE9 which integrates 9 programmable video signal processing elements AxPe on a silicon area of 16 cm2. Each AxPe has a peak arithmetic performance of 1 GOPS. In order to demonstrate the computational power of the MAXPE9 for video coding schemes in multimedia applications, an universal hardware platform based on a personal computer and software tools have been developed. It allows an efficient programming of the MAXPE9 including an immediate verification on hardware. Examples of video coding schemes to be investigated are hybrid coding according to ITU-T H.261, H.263 or ISO MPEG 1/2.
UR - http://www.scopus.com/inward/record.url?scp=0030348511&partnerID=8YFLogxK
M3 - Paper
AN - SCOPUS:0030348511
SP - 1151
EP - 1154
T2 - 1996 3rd IEEE International Conference on Electronics, Circuits, and Systems, ICECS. Part 2 (of 2)
Y2 - 13 October 1996 through 16 October 1996
ER -