Details
| Original language | English |
|---|---|
| Title of host publication | ANALOG 2018 |
| Subtitle of host publication | Meet Your CAD Guy / Meet Your Designer - 16. GMM/ITG-Fachtagung |
| Publisher | VDE Verlag GmbH |
| Pages | 74-79 |
| Number of pages | 6 |
| ISBN (electronic) | 9783800747542 |
| Publication status | Published - 2018 |
| Event | 16. GMM/ITG-Fachtagung ANALOG 2018: Meet Your CAD Guy / Meet Your Designer - 16th GMM/ITG Symposium ANALOG 2018: Meet Your CAD Guy/Meet Your Designer - Munchen/Neubiberg, Germany Duration: 13 Sept 2018 → 14 Sept 2018 |
Publication series
| Name | ANALOG 2018: Meet Your CAD Guy / Meet Your Designer - 16. GMM/ITG-Fachtagung |
|---|
Abstract
The metric driven verification methodology using a coverage concept is well-established in digital design. Analog circuits are much more heterogeneous with continuous parameter and state spaces. Therefore, the coverage concept has not been well defined and has not been used for analog circuits so far. Rapidly increasing verification quality demand motivate a new attempt to analog verification coverage. We present a systematic approach to define coverage based verification of analog and mixed-signal circuits. A base coverage model is derived by starting from the fundamental equation system. Based on this, several applied coverage models can be identified. This leads to a set of coverage metric definitions and their relation to real-life verification tasks. Examples illustrate the presented systematic approach and how existing verification tools will fit into the coverage based methodology presented and how upcoming methods like formal analog verification help to increase the verification coverage.
ASJC Scopus subject areas
- Computer Science(all)
- Hardware and Architecture
- Computer Science(all)
- Signal Processing
- Materials Science(all)
- Surfaces, Coatings and Films
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ANALOG 2018: Meet Your CAD Guy / Meet Your Designer - 16. GMM/ITG-Fachtagung. VDE Verlag GmbH, 2018. p. 74-79 (ANALOG 2018: Meet Your CAD Guy / Meet Your Designer - 16. GMM/ITG-Fachtagung).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Coverage measures and a unified coverage model for analog circuit design
AU - Fürtig, Andreas
AU - Hedrich, Lars
AU - Hartong, Walter
AU - Olbrich, Markus
AU - Rechmal, Malgorzata
N1 - Publisher Copyright: © VDE VERLAG GMBH ∙ Berlin ∙ Offenbach Copyright: Copyright 2021 Elsevier B.V., All rights reserved.
PY - 2018
Y1 - 2018
N2 - The metric driven verification methodology using a coverage concept is well-established in digital design. Analog circuits are much more heterogeneous with continuous parameter and state spaces. Therefore, the coverage concept has not been well defined and has not been used for analog circuits so far. Rapidly increasing verification quality demand motivate a new attempt to analog verification coverage. We present a systematic approach to define coverage based verification of analog and mixed-signal circuits. A base coverage model is derived by starting from the fundamental equation system. Based on this, several applied coverage models can be identified. This leads to a set of coverage metric definitions and their relation to real-life verification tasks. Examples illustrate the presented systematic approach and how existing verification tools will fit into the coverage based methodology presented and how upcoming methods like formal analog verification help to increase the verification coverage.
AB - The metric driven verification methodology using a coverage concept is well-established in digital design. Analog circuits are much more heterogeneous with continuous parameter and state spaces. Therefore, the coverage concept has not been well defined and has not been used for analog circuits so far. Rapidly increasing verification quality demand motivate a new attempt to analog verification coverage. We present a systematic approach to define coverage based verification of analog and mixed-signal circuits. A base coverage model is derived by starting from the fundamental equation system. Based on this, several applied coverage models can be identified. This leads to a set of coverage metric definitions and their relation to real-life verification tasks. Examples illustrate the presented systematic approach and how existing verification tools will fit into the coverage based methodology presented and how upcoming methods like formal analog verification help to increase the verification coverage.
UR - http://www.scopus.com/inward/record.url?scp=85099540381&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:85099540381
T3 - ANALOG 2018: Meet Your CAD Guy / Meet Your Designer - 16. GMM/ITG-Fachtagung
SP - 74
EP - 79
BT - ANALOG 2018
PB - VDE Verlag GmbH
T2 - 16. GMM/ITG-Fachtagung ANALOG 2018: Meet Your CAD Guy / Meet Your Designer - 16th GMM/ITG Symposium ANALOG 2018: Meet Your CAD Guy/Meet Your Designer
Y2 - 13 September 2018 through 14 September 2018
ER -