Architecture of a flexible on-board real-time SAR-processor

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Authors

  • S. Langemeyer
  • C. Simon-Klar
  • N. Nolte
  • P. Pirsch

Research Organisations

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Details

Original languageEnglish
Title of host publication25th Anniversary IGARSS 2005
Subtitle of host publicationIEEE International Geoscience and Remote Sensing Symposium
Pages1746-1749
Number of pages4
Publication statusPublished - 2005
Event2005 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2005 - Seoul, Korea, Republic of
Duration: 25 Jul 2005 → 29 Jul 2005

Publication series

NameInternational Geoscience and Remote Sensing Symposium (IGARSS)
Volume3

Abstract

In compact airborne SAR systems on-board processing requires a programmable and compact Multi-DSP solution. At the Laboratorium für Informationstechnologie (LfI), University of Hannover, a flexible Multi-DSP-Board has been developed. The architecture is based on the HiBRID-SoC, a programmable multi-core processor, optimized for SAR processing and image coding algorithms. Equiped with 6 HiBRID-SoCs a 233×175×15 mm board provides a realtime capability of processing SAR images with a raw data-rate of 50 MBit/s. Additional features are ROI support and image coding to reduce the required downlink bandwidth. The small volume and it's power consumption of less than 35 W enables it for on-board usage in air- or spaceborne systems. This paper presents the architecture of the system and explains how the different processing steps are mapped to the proposed hardware.

ASJC Scopus subject areas

Cite this

Architecture of a flexible on-board real-time SAR-processor. / Langemeyer, S.; Simon-Klar, C.; Nolte, N. et al.
25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium. 2005. p. 1746-1749 1526340 (International Geoscience and Remote Sensing Symposium (IGARSS); Vol. 3).

Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

Langemeyer, S, Simon-Klar, C, Nolte, N & Pirsch, P 2005, Architecture of a flexible on-board real-time SAR-processor. in 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium., 1526340, International Geoscience and Remote Sensing Symposium (IGARSS), vol. 3, pp. 1746-1749, 2005 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2005, Seoul, Korea, Republic of, 25 Jul 2005. https://doi.org/10.1109/IGARSS.2005.1526340
Langemeyer, S., Simon-Klar, C., Nolte, N., & Pirsch, P. (2005). Architecture of a flexible on-board real-time SAR-processor. In 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium (pp. 1746-1749). Article 1526340 (International Geoscience and Remote Sensing Symposium (IGARSS); Vol. 3). https://doi.org/10.1109/IGARSS.2005.1526340
Langemeyer S, Simon-Klar C, Nolte N, Pirsch P. Architecture of a flexible on-board real-time SAR-processor. In 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium. 2005. p. 1746-1749. 1526340. (International Geoscience and Remote Sensing Symposium (IGARSS)). doi: 10.1109/IGARSS.2005.1526340
Langemeyer, S. ; Simon-Klar, C. ; Nolte, N. et al. / Architecture of a flexible on-board real-time SAR-processor. 25th Anniversary IGARSS 2005: IEEE International Geoscience and Remote Sensing Symposium. 2005. pp. 1746-1749 (International Geoscience and Remote Sensing Symposium (IGARSS)).
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