Details
| Original language | English |
|---|---|
| Pages (from-to) | 2-13 |
| Number of pages | 12 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 3021 |
| Publication status | Published - 17 Jan 1997 |
| Event | Multimedia Hardware Architectures 1997 - San Jose, United States Duration: 8 Feb 1997 → 14 Feb 1997 |
Abstract
This paper presents an overview on architectures for multimedia purposes. Emphasis is given on flexible, programmable processors to enable processing of different standardised or proprietary multimedia applications. Several parallelisation strategies to enhance performance especially for video coding are described. This includes architectures like SIMD, MIMD and associative controlling. Exploitation of instruction-level parallelism by use of techniques like VLIW and packed-arithmetic extends this discussion. Reference to design examples from the literature is given. To help developing cost-effective architectures for a set of applications, two methods for modelling hardware and algorithms are explained. Instrumentation of algorithms implemented in software is discussed as a method to determine characteristics and features of given algorithms. Additionally, a more general approach is presented that analyses different parallelisation potentials for a class of algorithms. These are mapped on a simple hardware model using only few parameters for performance evaluation. Limitations of software instrumentation and the presented modelling approach are discussed.
Keywords
- Instrumentation, Modelling, MPEG, Multimedia processors, Processor architecture
ASJC Scopus subject areas
- Materials Science(all)
- Electronic, Optical and Magnetic Materials
- Physics and Astronomy(all)
- Condensed Matter Physics
- Computer Science(all)
- Computer Science Applications
- Mathematics(all)
- Applied Mathematics
- Engineering(all)
- Electrical and Electronic Engineering
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In: Proceedings of SPIE - The International Society for Optical Engineering, Vol. 3021, 17.01.1997, p. 2-13.
Research output: Contribution to journal › Conference article › Research › peer review
}
TY - JOUR
T1 - Architectural approaches for multimedia processors
AU - Pirsch, P.
AU - Freimann, A.
AU - Berekovic, M.
PY - 1997/1/17
Y1 - 1997/1/17
N2 - This paper presents an overview on architectures for multimedia purposes. Emphasis is given on flexible, programmable processors to enable processing of different standardised or proprietary multimedia applications. Several parallelisation strategies to enhance performance especially for video coding are described. This includes architectures like SIMD, MIMD and associative controlling. Exploitation of instruction-level parallelism by use of techniques like VLIW and packed-arithmetic extends this discussion. Reference to design examples from the literature is given. To help developing cost-effective architectures for a set of applications, two methods for modelling hardware and algorithms are explained. Instrumentation of algorithms implemented in software is discussed as a method to determine characteristics and features of given algorithms. Additionally, a more general approach is presented that analyses different parallelisation potentials for a class of algorithms. These are mapped on a simple hardware model using only few parameters for performance evaluation. Limitations of software instrumentation and the presented modelling approach are discussed.
AB - This paper presents an overview on architectures for multimedia purposes. Emphasis is given on flexible, programmable processors to enable processing of different standardised or proprietary multimedia applications. Several parallelisation strategies to enhance performance especially for video coding are described. This includes architectures like SIMD, MIMD and associative controlling. Exploitation of instruction-level parallelism by use of techniques like VLIW and packed-arithmetic extends this discussion. Reference to design examples from the literature is given. To help developing cost-effective architectures for a set of applications, two methods for modelling hardware and algorithms are explained. Instrumentation of algorithms implemented in software is discussed as a method to determine characteristics and features of given algorithms. Additionally, a more general approach is presented that analyses different parallelisation potentials for a class of algorithms. These are mapped on a simple hardware model using only few parameters for performance evaluation. Limitations of software instrumentation and the presented modelling approach are discussed.
KW - Instrumentation
KW - Modelling
KW - MPEG
KW - Multimedia processors
KW - Processor architecture
UR - http://www.scopus.com/inward/record.url?scp=0005243471&partnerID=8YFLogxK
U2 - 10.1117/12.263503
DO - 10.1117/12.263503
M3 - Conference article
AN - SCOPUS:0005243471
VL - 3021
SP - 2
EP - 13
JO - Proceedings of SPIE - The International Society for Optical Engineering
JF - Proceedings of SPIE - The International Society for Optical Engineering
SN - 0277-786X
T2 - Multimedia Hardware Architectures 1997
Y2 - 8 February 1997 through 14 February 1997
ER -