Details
| Original language | English |
|---|---|
| Title of host publication | Conference Proceedings - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013 |
| Pages | 245-248 |
| Number of pages | 4 |
| Publication status | Published - 2013 |
| Event | 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013 - Villach, Austria Duration: 24 Jun 2013 → 27 Jun 2013 |
Publication series
| Name | Conference Proceedings - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013 |
|---|
Abstract
This paper proposes a methodology for circuit simulation of parasitic effects caused by minority carrier injection into the substrate of a deep-trench based BCD technology. An equivalent circuit is used containing pre-calculated macro models for the injecting diode, the substrate of the chip and the sensitive diode. The macro models are generated by means of TCAD simulations which determine the carrier density distribution in the substrate. The carrier density in the substrate at the sensitive pn-junction is directly related to the parasitic current of the device. The results of the simulations are verified by test chip measurements.
ASJC Scopus subject areas
- Engineering(all)
- Electrical and Electronic Engineering
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Conference Proceedings - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013. 2013. p. 245-248 6603160 (Conference Proceedings - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - Analysis and modeling of minority carrier injection in deep-trench based BCD technologies
AU - Kollmitzer, Michael
AU - Olbrich, Markus
AU - Barke, Erich
N1 - Copyright: Copyright 2013 Elsevier B.V., All rights reserved.
PY - 2013
Y1 - 2013
N2 - This paper proposes a methodology for circuit simulation of parasitic effects caused by minority carrier injection into the substrate of a deep-trench based BCD technology. An equivalent circuit is used containing pre-calculated macro models for the injecting diode, the substrate of the chip and the sensitive diode. The macro models are generated by means of TCAD simulations which determine the carrier density distribution in the substrate. The carrier density in the substrate at the sensitive pn-junction is directly related to the parasitic current of the device. The results of the simulations are verified by test chip measurements.
AB - This paper proposes a methodology for circuit simulation of parasitic effects caused by minority carrier injection into the substrate of a deep-trench based BCD technology. An equivalent circuit is used containing pre-calculated macro models for the injecting diode, the substrate of the chip and the sensitive diode. The macro models are generated by means of TCAD simulations which determine the carrier density distribution in the substrate. The carrier density in the substrate at the sensitive pn-junction is directly related to the parasitic current of the device. The results of the simulations are verified by test chip measurements.
UR - http://www.scopus.com/inward/record.url?scp=84885409644&partnerID=8YFLogxK
U2 - 10.1109/PRIME.2013.6603160
DO - 10.1109/PRIME.2013.6603160
M3 - Conference contribution
AN - SCOPUS:84885409644
SN - 9781467345804
T3 - Conference Proceedings - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013
SP - 245
EP - 248
BT - Conference Proceedings - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013
T2 - 9th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2013
Y2 - 24 June 2013 through 27 June 2013
ER -