Details
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2011 |
| Pages | 335-342 |
| Number of pages | 8 |
| Publication status | Published - 2011 |
| Event | IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2011 - Dallas, United States Duration: 14 Dec 2011 → 16 Dec 2011 |
Publication series
| Name | Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems |
|---|---|
| ISSN (Print) | 1027-2658 |
Abstract
Utilising modern computer hardware like multi-core CPUs or Graphics Processing Units (GPUs) provides programmerswith great computational power to speedup their code. However, the effort to parallelise existing software does not always bear relation to the theoretically achievable speedup. This paper introduced a novel method for predicting the possible speedup, which can be achieved as the result of parallelisation of existing sequential source code to guide the programmer in the decision whether or not a parallelisation is worthwhile. Thereby, we consider multicore CPUs as well as many-core co-processors. Our evaluation results show that the computed speedup is similar to the real speedup, although our approach relies only on static code analysis.
Keywords
- GPU, Many-core, Multi-core, Parallelisation
ASJC Scopus subject areas
- Computer Science(all)
- Software
- Computer Science(all)
- Hardware and Architecture
- Computer Science(all)
- Computer Networks and Communications
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Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2011. 2011. p. 335-342 (Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - A model based approach for computing speedup on parallel machines using static code analysis
AU - Zgeras, Ioannis
AU - Brehm, Jürgen
AU - Sprodowski, Tobias
PY - 2011
Y1 - 2011
N2 - Utilising modern computer hardware like multi-core CPUs or Graphics Processing Units (GPUs) provides programmerswith great computational power to speedup their code. However, the effort to parallelise existing software does not always bear relation to the theoretically achievable speedup. This paper introduced a novel method for predicting the possible speedup, which can be achieved as the result of parallelisation of existing sequential source code to guide the programmer in the decision whether or not a parallelisation is worthwhile. Thereby, we consider multicore CPUs as well as many-core co-processors. Our evaluation results show that the computed speedup is similar to the real speedup, although our approach relies only on static code analysis.
AB - Utilising modern computer hardware like multi-core CPUs or Graphics Processing Units (GPUs) provides programmerswith great computational power to speedup their code. However, the effort to parallelise existing software does not always bear relation to the theoretically achievable speedup. This paper introduced a novel method for predicting the possible speedup, which can be achieved as the result of parallelisation of existing sequential source code to guide the programmer in the decision whether or not a parallelisation is worthwhile. Thereby, we consider multicore CPUs as well as many-core co-processors. Our evaluation results show that the computed speedup is similar to the real speedup, although our approach relies only on static code analysis.
KW - GPU
KW - Many-core
KW - Multi-core
KW - Parallelisation
UR - http://www.scopus.com/inward/record.url?scp=84856689030&partnerID=8YFLogxK
U2 - 10.2316/P.2011.757-037
DO - 10.2316/P.2011.757-037
M3 - Conference contribution
AN - SCOPUS:84856689030
SN - 9780889869073
T3 - Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems
SP - 335
EP - 342
BT - Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2011
T2 - IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2011
Y2 - 14 December 2011 through 16 December 2011
ER -