Details
| Original language | English |
|---|---|
| Pages (from-to) | 1006-1014 |
| Number of pages | 9 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 4671 II |
| Publication status | Published - 4 Jan 2002 |
Abstract
With the increase of the complex of VLSI such as the SoC (System on Chip) of MPEG-21 Video decoder with HDTV scalability especially, simulation and verification of the full design, even as high as the behavior level in HDL, often proves to be very slow, costly and it is difficult to perform full verification until late in the design process. Therefore, they become bottleneck of the procedure of HDTV video decoder design, and influence it's time-to-market mostly, In this paper, the architecture of Hardware/Software Interface of HDTV video decoder is studied, and a Hardware-Software Mixed Simulation (HSMS) platform is proposed to check and correct error in the early design stage, based on the algorithm of MPEG-2 video decoding. The application of HSMS to target system could be achieved by employing several introduced approaches. Those approaches speed up the simulation and verification task without decreasing performance.
Keywords
- HDTV, MPEG-2, Verification, Video decoder
ASJC Scopus subject areas
- Materials Science(all)
- Electronic, Optical and Magnetic Materials
- Physics and Astronomy(all)
- Condensed Matter Physics
- Computer Science(all)
- Computer Science Applications
- Mathematics(all)
- Applied Mathematics
- Engineering(all)
- Electrical and Electronic Engineering
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In: Proceedings of SPIE - The International Society for Optical Engineering, Vol. 4671 II, 04.01.2002, p. 1006-1014.
Research output: Contribution to journal › Article › Research › peer review
}
TY - JOUR
T1 - A high efficient simulation environment for HDTV video decoder in VLSI design
AU - Mao, Xun
AU - Wang, Hui
AU - Gong, Huiming
AU - Wang, Wei
AU - He, Yanli
AU - Lou, Jian
AU - Yu, Lu
AU - Yao, Qindong
AU - Pirsch, Peter
PY - 2002/1/4
Y1 - 2002/1/4
N2 - With the increase of the complex of VLSI such as the SoC (System on Chip) of MPEG-21 Video decoder with HDTV scalability especially, simulation and verification of the full design, even as high as the behavior level in HDL, often proves to be very slow, costly and it is difficult to perform full verification until late in the design process. Therefore, they become bottleneck of the procedure of HDTV video decoder design, and influence it's time-to-market mostly, In this paper, the architecture of Hardware/Software Interface of HDTV video decoder is studied, and a Hardware-Software Mixed Simulation (HSMS) platform is proposed to check and correct error in the early design stage, based on the algorithm of MPEG-2 video decoding. The application of HSMS to target system could be achieved by employing several introduced approaches. Those approaches speed up the simulation and verification task without decreasing performance.
AB - With the increase of the complex of VLSI such as the SoC (System on Chip) of MPEG-21 Video decoder with HDTV scalability especially, simulation and verification of the full design, even as high as the behavior level in HDL, often proves to be very slow, costly and it is difficult to perform full verification until late in the design process. Therefore, they become bottleneck of the procedure of HDTV video decoder design, and influence it's time-to-market mostly, In this paper, the architecture of Hardware/Software Interface of HDTV video decoder is studied, and a Hardware-Software Mixed Simulation (HSMS) platform is proposed to check and correct error in the early design stage, based on the algorithm of MPEG-2 video decoding. The application of HSMS to target system could be achieved by employing several introduced approaches. Those approaches speed up the simulation and verification task without decreasing performance.
KW - HDTV
KW - MPEG-2
KW - Verification
KW - Video decoder
UR - http://www.scopus.com/inward/record.url?scp=0036028981&partnerID=8YFLogxK
U2 - 10.1117/12.453023
DO - 10.1117/12.453023
M3 - Article
AN - SCOPUS:0036028981
VL - 4671 II
SP - 1006
EP - 1014
JO - Proceedings of SPIE - The International Society for Optical Engineering
JF - Proceedings of SPIE - The International Society for Optical Engineering
SN - 0277-786X
ER -