Details
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 1998 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 3153-3156 |
| Number of pages | 4 |
| ISBN (print) | 0780344286, 9780780344280 |
| Publication status | Published - 1998 |
| Event | 1998 23rd IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 1998 - Seattle, WA, United States Duration: 12 May 1998 → 15 May 1998 |
Publication series
| Name | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings |
|---|---|
| Volume | 5 |
| ISSN (Print) | 1520-6149 |
Abstract
This paper proposes a new array architecture for MPEG-4 image compositing. The emerging MPEG4 standard for multimedia applications allows script-based compositing of audiovisual scenes from multiple audio and visual objects. MPEG-4 supports both, natural (video) and synthetic (3D) visual objects or a combination of both. Objects can be manipulated, e.g. positioned, rotated, warped or duplicated by user interaction. A coprocessor architecture is presented, that works in parallel to an MPEG-4 video- and audio-decoder, and performs computation and bandwidth intensive low-level tasks for image compositing. The processor consists of an SIMD array of 16 DSPs to reach the required processing power for real-time image warping, alpha-blending and 3D rendering tasks. A programmable architecture allows one to adapt the processing resources to the specific needs of different tasks and applications. The processor has an object-oriented cache architecture with 2D virtual address space (e.g. textures), that allows concurrent and conflict-free access to shared data objects for all 16 DSPs. Especially I/O intensive tasks like texture-mapping, alpha-blending, image warping, z-buffer and shading algorithms benefit from shared memory caches and the possibility to preload data before it is accessed.
ASJC Scopus subject areas
- Computer Science(all)
- Software
- Computer Science(all)
- Signal Processing
- Engineering(all)
- Electrical and Electronic Engineering
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Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 1998. Institute of Electrical and Electronics Engineers Inc., 1998. p. 3153-3156 678195 (ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings; Vol. 5).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - A flexible processor architecture for MPEG-4 image compositing
AU - Berekovic, M.
AU - Frase, R.
AU - Pirsch, P.
PY - 1998
Y1 - 1998
N2 - This paper proposes a new array architecture for MPEG-4 image compositing. The emerging MPEG4 standard for multimedia applications allows script-based compositing of audiovisual scenes from multiple audio and visual objects. MPEG-4 supports both, natural (video) and synthetic (3D) visual objects or a combination of both. Objects can be manipulated, e.g. positioned, rotated, warped or duplicated by user interaction. A coprocessor architecture is presented, that works in parallel to an MPEG-4 video- and audio-decoder, and performs computation and bandwidth intensive low-level tasks for image compositing. The processor consists of an SIMD array of 16 DSPs to reach the required processing power for real-time image warping, alpha-blending and 3D rendering tasks. A programmable architecture allows one to adapt the processing resources to the specific needs of different tasks and applications. The processor has an object-oriented cache architecture with 2D virtual address space (e.g. textures), that allows concurrent and conflict-free access to shared data objects for all 16 DSPs. Especially I/O intensive tasks like texture-mapping, alpha-blending, image warping, z-buffer and shading algorithms benefit from shared memory caches and the possibility to preload data before it is accessed.
AB - This paper proposes a new array architecture for MPEG-4 image compositing. The emerging MPEG4 standard for multimedia applications allows script-based compositing of audiovisual scenes from multiple audio and visual objects. MPEG-4 supports both, natural (video) and synthetic (3D) visual objects or a combination of both. Objects can be manipulated, e.g. positioned, rotated, warped or duplicated by user interaction. A coprocessor architecture is presented, that works in parallel to an MPEG-4 video- and audio-decoder, and performs computation and bandwidth intensive low-level tasks for image compositing. The processor consists of an SIMD array of 16 DSPs to reach the required processing power for real-time image warping, alpha-blending and 3D rendering tasks. A programmable architecture allows one to adapt the processing resources to the specific needs of different tasks and applications. The processor has an object-oriented cache architecture with 2D virtual address space (e.g. textures), that allows concurrent and conflict-free access to shared data objects for all 16 DSPs. Especially I/O intensive tasks like texture-mapping, alpha-blending, image warping, z-buffer and shading algorithms benefit from shared memory caches and the possibility to preload data before it is accessed.
UR - http://www.scopus.com/inward/record.url?scp=0031619417&partnerID=8YFLogxK
U2 - 10.1109/ICASSP.1998.678195
DO - 10.1109/ICASSP.1998.678195
M3 - Conference contribution
AN - SCOPUS:0031619417
SN - 0780344286
SN - 9780780344280
T3 - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
SP - 3153
EP - 3156
BT - Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 1998
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1998 23rd IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 1998
Y2 - 12 May 1998 through 15 May 1998
ER -