Details
| Original language | English |
|---|---|
| Title of host publication | 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 41-44 |
| Number of pages | 4 |
| ISBN (electronic) | 9781479982295 |
| Publication status | Published - 9 Sept 2015 |
| Externally published | Yes |
| Event | 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015 - Glasgow, United Kingdom (UK) Duration: 29 Jun 2015 → 2 Jul 2015 |
Publication series
| Name | 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015 |
|---|
Abstract
Size and cost of a switched mode power supply can be reduced by increasing the switching frequency. The maximum switching frequency and the maximum conversion ratio are limited by the duty cycle of a PWM signal. In DCDC converters, a sawtooth generator is the fundamental circuit block to generate the PWM signal. The presented PWM generator is based on two parallel, fully interleaved PWM generator stages, each containing an integrator based sawtooth generator and two 3-stage highspeed comparators. A digital multiplexing of the PWM signals of each stage eliminates the dependency of the minimum on-time on the large reset times of the sawtooth ramps. A separation of the references of the PWM comparators in both stage allows to configure the PWM generator for a DCDC converter operating in fixed frequency or in constant on-time mode, which requires an operation in a wide frequency range. The PWM generator was fabricated in an 180 nm HV BiCMOS technology, as part of a DCDC converter. Measurements confirm minimum possible on-time pulses as short as 2 ns and thus allows switching frequencies of DCDC converters of >50 MHz at small duty cycle of <10%. At moderate duty cycles switching frequencies up to 100 MHz are possible.
ASJC Scopus subject areas
- Engineering(all)
- Electrical and Electronic Engineering
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2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 41-44 7251089 (2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - A configurable sawtooth based PWM generator with 2 ns on-time for >50 MHz DCDC converters
AU - Wittmann, Juergen
AU - Wicht, Bernhard
N1 - Publisher Copyright: © 2015 IEEE.
PY - 2015/9/9
Y1 - 2015/9/9
N2 - Size and cost of a switched mode power supply can be reduced by increasing the switching frequency. The maximum switching frequency and the maximum conversion ratio are limited by the duty cycle of a PWM signal. In DCDC converters, a sawtooth generator is the fundamental circuit block to generate the PWM signal. The presented PWM generator is based on two parallel, fully interleaved PWM generator stages, each containing an integrator based sawtooth generator and two 3-stage highspeed comparators. A digital multiplexing of the PWM signals of each stage eliminates the dependency of the minimum on-time on the large reset times of the sawtooth ramps. A separation of the references of the PWM comparators in both stage allows to configure the PWM generator for a DCDC converter operating in fixed frequency or in constant on-time mode, which requires an operation in a wide frequency range. The PWM generator was fabricated in an 180 nm HV BiCMOS technology, as part of a DCDC converter. Measurements confirm minimum possible on-time pulses as short as 2 ns and thus allows switching frequencies of DCDC converters of >50 MHz at small duty cycle of <10%. At moderate duty cycles switching frequencies up to 100 MHz are possible.
AB - Size and cost of a switched mode power supply can be reduced by increasing the switching frequency. The maximum switching frequency and the maximum conversion ratio are limited by the duty cycle of a PWM signal. In DCDC converters, a sawtooth generator is the fundamental circuit block to generate the PWM signal. The presented PWM generator is based on two parallel, fully interleaved PWM generator stages, each containing an integrator based sawtooth generator and two 3-stage highspeed comparators. A digital multiplexing of the PWM signals of each stage eliminates the dependency of the minimum on-time on the large reset times of the sawtooth ramps. A separation of the references of the PWM comparators in both stage allows to configure the PWM generator for a DCDC converter operating in fixed frequency or in constant on-time mode, which requires an operation in a wide frequency range. The PWM generator was fabricated in an 180 nm HV BiCMOS technology, as part of a DCDC converter. Measurements confirm minimum possible on-time pulses as short as 2 ns and thus allows switching frequencies of DCDC converters of >50 MHz at small duty cycle of <10%. At moderate duty cycles switching frequencies up to 100 MHz are possible.
UR - http://www.scopus.com/inward/record.url?scp=84946843934&partnerID=8YFLogxK
U2 - 10.1109/PRIME.2015.7251089
DO - 10.1109/PRIME.2015.7251089
M3 - Conference contribution
AN - SCOPUS:84946843934
T3 - 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015
SP - 41
EP - 44
BT - 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015
Y2 - 29 June 2015 through 2 July 2015
ER -