Details
| Original language | English |
|---|---|
| Title of host publication | 2017 IEEE Applied Power Electronics Conference and Exposition (APEC) |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 3570-3575 |
| Number of pages | 6 |
| ISBN (electronic) | 9781509053667 |
| ISBN (print) | 9781509053674 |
| Publication status | Published - 2017 |
| Externally published | Yes |
| Event | 32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017 - Tampa, United States Duration: 26 Mar 2017 → 30 Mar 2017 |
Publication series
| Name | Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC |
|---|---|
| ISSN (electronic) | 2470-6647 |
Abstract
Modern power transistors are able to switch at very high transition speed, which can cause EMC violations and overshoot. This is addressed by a gate driver with variable gate current, which is able to control the transition speed. The key idea is that the gate driver can influence the di/dt and dv/dt transition separately and optimize whichever transition promises the highest improvement while keeping switching losses low. To account for changes in the load current, supply voltage, etc., a control loop is required in the driver to ensure optimized switching. In this paper, a efficient control scheme for an automotive gate driver with variable output current capability is presented. The effectiveness of the control loop is demonstrated for a MOSFET bridge consisting of OptiMOS-T2™devices with a total gate charge of 39nC. This bridge setup shows dv/dt transitions between 50 to 1000ns, depending on driving current. The driver is able to switch between gate current levels of 1 to 500mA in 10/15ns (rising/falling transition). With the implemented control loop the driver is measured to significantly reduce the ringing and thereby reduce device stress and electromagnetic emissions while keeping switching losses 52% lower than with a constant current driver.
ASJC Scopus subject areas
- Engineering(all)
- Electrical and Electronic Engineering
Cite this
- Standard
- Harvard
- Apa
- Vancouver
- BibTeX
- RIS
2017 IEEE Applied Power Electronics Conference and Exposition (APEC). Institute of Electrical and Electronics Engineers Inc., 2017. p. 3570-3575 7931210 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).
Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
}
TY - GEN
T1 - 10ns Variable Current Gate Driver with Control Loop for Optimized Gate Current Timing and Level Control for In-Transition Slope Shaping
AU - Schindler, Alexis
AU - Koeppl, Benno
AU - Wicht, Bernhard
AU - Groeger, Johannes
N1 - Publisher Copyright: © 2017 IEEE. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2017
Y1 - 2017
N2 - Modern power transistors are able to switch at very high transition speed, which can cause EMC violations and overshoot. This is addressed by a gate driver with variable gate current, which is able to control the transition speed. The key idea is that the gate driver can influence the di/dt and dv/dt transition separately and optimize whichever transition promises the highest improvement while keeping switching losses low. To account for changes in the load current, supply voltage, etc., a control loop is required in the driver to ensure optimized switching. In this paper, a efficient control scheme for an automotive gate driver with variable output current capability is presented. The effectiveness of the control loop is demonstrated for a MOSFET bridge consisting of OptiMOS-T2™devices with a total gate charge of 39nC. This bridge setup shows dv/dt transitions between 50 to 1000ns, depending on driving current. The driver is able to switch between gate current levels of 1 to 500mA in 10/15ns (rising/falling transition). With the implemented control loop the driver is measured to significantly reduce the ringing and thereby reduce device stress and electromagnetic emissions while keeping switching losses 52% lower than with a constant current driver.
AB - Modern power transistors are able to switch at very high transition speed, which can cause EMC violations and overshoot. This is addressed by a gate driver with variable gate current, which is able to control the transition speed. The key idea is that the gate driver can influence the di/dt and dv/dt transition separately and optimize whichever transition promises the highest improvement while keeping switching losses low. To account for changes in the load current, supply voltage, etc., a control loop is required in the driver to ensure optimized switching. In this paper, a efficient control scheme for an automotive gate driver with variable output current capability is presented. The effectiveness of the control loop is demonstrated for a MOSFET bridge consisting of OptiMOS-T2™devices with a total gate charge of 39nC. This bridge setup shows dv/dt transitions between 50 to 1000ns, depending on driving current. The driver is able to switch between gate current levels of 1 to 500mA in 10/15ns (rising/falling transition). With the implemented control loop the driver is measured to significantly reduce the ringing and thereby reduce device stress and electromagnetic emissions while keeping switching losses 52% lower than with a constant current driver.
UR - http://www.scopus.com/inward/record.url?scp=85020008164&partnerID=8YFLogxK
U2 - 10.1109/APEC.2017.7931210
DO - 10.1109/APEC.2017.7931210
M3 - Conference contribution
AN - SCOPUS:85020008164
SN - 9781509053674
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 3570
EP - 3575
BT - 2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017
Y2 - 26 March 2017 through 30 March 2017
ER -