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Institute of Microelectronic Systems

Organisational unit: Institute

Type of address: Visitor address.
Appelstraße 4
30167
Hannover
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341 - 360 out of 584Page size: 20

Publications

  1. 2016
  2. Published

    Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation

    Hesselbarth, S., Schewior, G. & Blume, H., 4 Jan 2016, Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing: DASIP . Cerisier, S. & Morawiec, A. (eds.). IEEE Computer Society

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  3. Published

    A General Purpose FPGA-Accelerator with Standard USB 3.0 Interface

    Rath, J., Dürre, J. C. & Blume, H. C., 2016. 1 p.

    Research output: Contribution to conference › Poster › Research

  4. Published

    A Low Latency Multichannel Audio Interface for Low Power SIMD Digital Signal Processors

    Gerlach, L. K., Payá Vayá, G. & Blume, H. C., 2016, ICT.OPEN Conference. p. 4-9

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  5. Published

    Analyzing the Performance-Hardware Trade-off of ASIP-based Image Feature Extraction

    Blume, H. C. & Mentzer, N., 2016.

    Research output: Contribution to conference › Slides to presentation › Research

  6. Published

    A Scalable Architecture for Low-Latency Network- Encryption in Low-Power Devices

    Baydakov, K., Roskamp, S., Wohnrade, K., Dürre, J. C. & Blume, H. C., 2016.

    Research output: Contribution to conference › Poster › Research

  7. Published

    Embedded tutorial - Analog-/mixed-signal verification methods for AMS coverage analysis.

    Barke, E., Fürtig, A., Gläser, G., Grimm, C., Hedrich, L., Heinen, S., Hennig, E., Lee, H. L., Nebel, W., Nitsche, G., Olbrich, M., Radojicic, C. & Speicher, F., 2016, p. 1102-1111. 10 p.

    Research output: Contribution to conference › Paper › Research › peer review

  8. Published

    LibARITH - A Highly Optimized Arithmetic Software Library and Hardware Co-processor IP for Fixed-Point VLIW-SIMD Processor Architectures: D3.43: Individual TTP43 abstract

    Blume, H. C., 2016, LibARITH - A Highly Optimized Arithmetic Software Library and Hardware Co-processor IP for Fixed-Point VLIW-SIMD Processor Architectures.

    Research output: Chapter in book/report/conference proceeding › Contribution to book/anthology › Research

  9. Published

    Mobile platform for real-time sonification of movements for medical rehabilitation: D3.43: Individual TTP43 abstract

    Blume, H. C., 2016, Mobile platform for real-time sonification of movements for medical rehabilitation.

    Research output: Chapter in book/report/conference proceeding › Contribution to project report/research report › Research

  10. Published

    Mobile Platform for Real-time Sonification of Movements for Medical Rehabilitation: Poster

    Pfefferkorn, D. & Blume, H. C., 2016, Mobile Platform for Real-time Sonification of Movements for Medical Rehabilitation.

    Research output: Chapter in book/report/conference proceeding › Contribution to project report/research report › Research

  11. Published

    Modeling of Linear Stimuli for Accelerated Mixed-Signal Simulations

    Divanbeigi, S., Lee, H. S. L., Röhrig, E., Olbrich, M. & Barke, E., 2016, ANALOG 2016 - 15. ITG/GMM-Fachtagung. VDE Verlag GmbH, p. 70-74 5 p. (ANALOG 2016 - 15. ITG/GMM-Fachtagung).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  12. Published

    Simulation of needle bumps in a package-on-package structure

    Weide-Zaage, K. & Xu, P., 2016, IMAPS Nordic Annual Conference 2016 Proceedings. Kutilainen, J. (ed.). IMAPS-International Microelectronics and Packaging Society, (IMAPS Nordic Annual Conference 2016 Proceedings).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  13. Published

    Teaching Digital Logic Circuit Design via Experiment-Based Learning - Print your own Logic Circuit

    Dürre, J., Payá Vayá, G. & Blume, H., 2016, 20th World Multi-Conference on Systemics, Cybernetics and Informatics: Proceedings. Callaos, N. C., Sanchez, B., Lace, N., Savoie, M. & Tremante, A. (eds.). Vol. 1. p. 242-247 6 p.

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  14. 2015
  15. Published

    FNOCEE: A Framework for NoC Evaluation by FPGA-based Emulation

    Pfefferkorn, D., Schmider, A., Payá-Vayá, G., Neuenhahn, M. & Blume, H., 28 Dec 2015, Proceedings - 2015 - International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XV). Carro, L. & Soudris, D. (eds.). IEEE Computer Society, p. 86-95 10 p.

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  16. Published

    An electronic encapsulated Monitoring System for a Vascular Graft Bioreactor

    Leibold, C., Kornau, N., Blume, C., Blume, H. & Wilhelmi, M., 7 Dec 2015, BiOCAS 2015 - Engineering for Healthy Minds and Able Bodies: Proceedings. IEEE Computer Society

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  17. Published

    An Area Efficient Real- and Complex-Valued Multiply-Accumulate SIMD Unit for Digital Signal Processors

    Gerlach, L., Payá-Vayá, G. & Blume, H., 3 Dec 2015, 2015 IEEE Workshop on Signal Processing Systems (SiPS). IEEE Computer Society

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  18. Published

    Realtime FPGA-based Processing Unit for a High-Resolution Automotive MIMO Radar Platform

    Meinl, F., Schubert, E., Kunert, M. & Blume, H., 2 Dec 2015, 2015 European Radar Conference (EuRAD) : Proceedings. IEEE Computer Society, p. 213-216 4 p.

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  19. Published

    Abstracting Parallel Programming and Its Analysis Towards Framework Independent Development

    Arndt, O. J., Lefherz, T. & Blume, H., 12 Nov 2015, IEEE 9th International Symposium on Embedded Multicore/Manycore Socs: Proceedings. IEEE Computer Society, p. 96-103 8 p.

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  20. Published

    Forschungs- und Entwicklungsprojekt: Schaltungsentwurf und physikalisches Design für neuartige FPGA-Architektur: Teilvorhaben: FPGA-Architekturevaluation, Benchmarking und Place&Route (Verbundpartner IMS) : KMU Innovativ : FPGA : Abschlussbericht

    Blume, H., Bredthauer, B., Olbrich, M. & Spindeldreier, C., Nov 2015, 24 p.

    Research output: Book/Report › Project report/research report › Research

  21. Published

    Design space exploration of hardware platforms for interactive low latency movement sonification

    Brückner, H. P., Lesse, S., Theimer, W. & Blume, H., 22 Sept 2015, In: Journal on Multimodal User Interfaces. 10, 1, p. 1-11 11 p.

    Research output: Contribution to journal › Article › Research › peer review

  22. Published

    Hardware Accelerator for Minimum Mean Square Error Interference Alignment

    Kock, M., Busch, S. & Blume, H., 10 Sept 2015, 2015 IEEE International Conference on Digital Signal Processing (DSP): DSP 2015. IEEE Computer Society, p. 575-579 5 p.

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

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