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Architectures and Systems Section

Organisational unit: Section/Division

Type of address: Visitor address.
Appelstraße 4
30167
Hannover
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121 - 140 out of 183Page size: 20

Publications

  1. 2017
  2. Published

    Teaching VHDL Design to Schoolchildren – A Scalable and Flexible FPGA Framework: A Scalable and Flexible FPGA Framework

    Dürre, J. C. & Blume, H. C., 2017.

    Research output: Contribution to conference › Paper › Research › peer review

  3. Published

    Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems The DESERVE Approach Preface

    Blume, H., 2017, In: River Publishers Series in Transport Technology.

    Research output: Contribution to journal › Article › Research › peer review

  4. Published

    Wege zum Smartphone: zur Kultur- und Technikgeschichte der Kommunikationsmedien : Begleitbuch zur Ausstellung im Historischen Museum Hannover, 27.09.2017 bis 08.04.2018

    Hieber, L., Mathis, W., Titze, A. & Urban, A., 2017, Hannover. (Schriften des Historischen Museums Hannover; vol. Band 45)

    Research output: Book/Report › Monograph › Research

  5. 2016
  6. Published

    A General Purpose FPGA-Accelerator with Standard USB 3.0 Interface

    Rath, J., Dürre, J. C. & Blume, H. C., 2016. 1 p.

    Research output: Contribution to conference › Poster › Research

  7. Published

    A Low Latency Multichannel Audio Interface for Low Power SIMD Digital Signal Processors

    Gerlach, L. K., Payá Vayá, G. & Blume, H. C., 2016, ICT.OPEN Conference. p. 4-9

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  8. Published

    Analyzing the Performance-Hardware Trade-off of ASIP-based Image Feature Extraction

    Blume, H. C. & Mentzer, N., 2016.

    Research output: Contribution to conference › Slides to presentation › Research

  9. Published

    A Scalable Architecture for Low-Latency Network- Encryption in Low-Power Devices

    Baydakov, K., Roskamp, S., Wohnrade, K., Dürre, J. C. & Blume, H. C., 2016.

    Research output: Contribution to conference › Poster › Research

  10. Published

    LibARITH - A Highly Optimized Arithmetic Software Library and Hardware Co-processor IP for Fixed-Point VLIW-SIMD Processor Architectures: D3.43: Individual TTP43 abstract

    Blume, H. C., 2016, LibARITH - A Highly Optimized Arithmetic Software Library and Hardware Co-processor IP for Fixed-Point VLIW-SIMD Processor Architectures.

    Research output: Chapter in book/report/conference proceeding › Contribution to book/anthology › Research

  11. Published

    Mobile platform for real-time sonification of movements for medical rehabilitation: D3.43: Individual TTP43 abstract

    Blume, H. C., 2016, Mobile platform for real-time sonification of movements for medical rehabilitation.

    Research output: Chapter in book/report/conference proceeding › Contribution to project report/research report › Research

  12. Published

    Mobile Platform for Real-time Sonification of Movements for Medical Rehabilitation: Poster

    Pfefferkorn, D. & Blume, H. C., 2016, Mobile Platform for Real-time Sonification of Movements for Medical Rehabilitation.

    Research output: Chapter in book/report/conference proceeding › Contribution to project report/research report › Research

  13. 2015
  14. Published

    Forschungs- und Entwicklungsprojekt: Schaltungsentwurf und physikalisches Design für neuartige FPGA-Architektur: Teilvorhaben: FPGA-Architekturevaluation, Benchmarking und Place&Route (Verbundpartner IMS) : KMU Innovativ : FPGA : Abschlussbericht

    Blume, H., Bredthauer, B., Olbrich, M. & Spindeldreier, C., Nov 2015, 24 p.

    Research output: Book/Report › Project report/research report › Research

  15. Published

    Exploring Different Approximate Adder Architecture Implementations in a 250 C SOI Technology

    Nowosielski, R., Hartig, J., Payá Vayá, G., Blume, H. C. & García-Ortiz, A., 2015.

    Research output: Contribution to conference › Paper › Research

  16. Published

    Parallel Implementation of Real-Time Block-Matching based Motion Estimation on Embedded Multi-Core Architectures

    Behmann, N., Arndt, O. J. & Blume, H. C., 2015. 7 p.

    Research output: Contribution to conference › Paper › Research › peer review

  17. 2014
  18. Published

    Implementation of Phase-to-Amplitude Coupling Analysis Algorithms in Deep Brain Stimulation Devices

    Dellavale, D., Kock, M., Blume, H. C., Alam, M., Schwabe, K. & Krauss, J., 27 Sept 2014, In: Biomedizinische Technik. 59, s1

    Research output: Contribution to journal › Conference article › Research › peer review

  19. Published

    HLS-based FPG A Implementation of a Predictive Block-based Motion Estimation Algorithm - A Field Report

    Schewior, G., Zahl, C., Blume, H., Wonneberger, S. & Effertz, J., 2014, In: Conference on Design and Architectures for Signal and Image Processing.

    Research output: Contribution to journal › Article › Research › peer review

  20. Published

    Mikroelektronik - Ausbildung am Institut für Mikroelektronische Systeme der Leibniz Universität Hannover

    Blume, H. C., Brückner, H. P., Leibold, C. & Schmädecke, I., 2014.

    Research output: Contribution to conference › Slides to presentation › Research

  21. Published

    PBA2CUDA: A framework for parallelizing population based algorithms using CUDA

    Zgeras, I., Brehm, J. & Knoppik, M., 2014, ARCS 2014 : 2014 Workshop Proceedings on Architecture of Computing Systems. Institute of Electrical and Electronics Engineers Inc., (ARCS 2014 - 2014 Workshop Proceedings on Architecture of Computing Systems).

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review

  22. 2013
  23. Published

    Preface

    Jeschke, H. & Silvén, O., 15 Jul 2013, Proceedings - 2013 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2013. IEEE Computer Society, 1 p.

    Research output: Chapter in book/report/conference proceeding › Foreword/postscript › Research › peer review

  24. Published

    Effiziente Hardwarearchitekturen für Interference Alignment in drahtlosen Kommunikationssystemen

    Kock, M. & Blume, H. C., 1 Mar 2013, 15. ITG-Fachtagung für Elektronische Medien (Fernsehseminar). Dortmund

    Research output: Chapter in book/report/conference proceeding › Conference contribution › Research

  25. Published

    Effiziente Hardwarearchitekturen für Interference Alignment in drahtlosen Kommunikationssystemen

    Kock, M. & Blume, H. C., 1 Mar 2013.

    Research output: Contribution to conference › Slides to presentation › Research

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