Publications
- 2018
- Published
Processor Architecture Tradeoffs for On-Site Electronics in Harsh Environment
Nolting, S., Gesper, S., Schmider, A., Weißbrich, M., Stuckenberg, T., Payá Vayá, G. & Blume, H. C., 2018.Research output: Contribution to conference › Paper › Research › peer review
- 2017
- Published
MIMO Backscatter Channel and Data Transmission Measurements
Denicke, E., Hartmann, H., Geck, B. & Manteuffel, D., 21 Dec 2017, Proceedings of the 47th European Microwave Conference. Institute of Electrical and Electronics Engineers Inc., p. 723-726 4 p.Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
- Published
Tool-supported design space exploration of a processor system for SIFT-feature detection
Hartig, J., Paya-Vaya, G., Heymann, H. & Blume, H., 18 Dec 2017, 2017 IEEE 7th International Conference on Consumer Electronics - Berlin (ICCE-Berlin). IEEE Computer Society, p. 168-169 2 p.Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
- Published
Konzeptionierung und Implementierung einer hybriden MAC-Layer-Architektur für Paket-basierte Powerline Kommunikation auf einem FPGA
Rother, N., 18 Oct 2017, 83 p.Research output: Thesis › Master's thesis
- Published
Analyzing the Trade-Off between Power Consumption and Beamforming Algorithm Performance using a Hearing Aid ASIP
Gerlach, L., Paya-Vaya, G., Liu, S., Weisbrich, M., Blume, H., Marquardt, D. & Doclo, S., 2 Jul 2017, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII). Patt, Y. & Nandy, S. K. (eds.). IEEE Computer Society, p. 88-96 9 p.Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
- Published
High Performance and Low Power Architectures: GPU vs. FPGA for Fast Factorized Backprojection
Wielage, M., Cholewa, F., Fahnemann, C., Pirsch, P. & Blume, H., 2 Jul 2017, 2017 Fifth International Symposium on Computing and Networking. IEEE Computer Society, p. 351-357 7 p.Research output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
- Published
Preface
Payá Vayá, G. & Blume, H., 1 Jun 2017, Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems: The DESERVE Approach. River Publishers, p. xiii-xvResearch output: Chapter in book/report/conference proceeding › Foreword/postscript › Research › peer review
- Published
Cochlea-Implantat
Blume, H. (Inventor), Ertmer, W. (Inventor), Lenarz, T. (Inventor) & Kral, A. (Inventor), 2 Mar 2017, IPC No. A61N1/05, H02J50/10, H02J50/05, A61N1/00, A61N1/36, Patent No. DE102015114514, 31 Aug 2015, Priority date 31 Aug 2015, Priority No. DE201510114514Research output: Patent
- Published
Parallelization strategies for fast factorized backprojection SAR on embedded multi-core architectures
Wielage, M., Cholewa, F., Riggers, C., Pirsch, P. & Blume, H., 4 Jan 2017, 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS). IEEE Computer SocietyResearch output: Chapter in book/report/conference proceeding › Conference contribution › Research › peer review
- Published
An Integrated Heated Testbench for Characterizing High Temperature ICs
Webering, F., Payá Vayá, G., Aditya, E., Dürre, J. C. & Blume, H. C., 2017, ICT.OPEN Proceedings 2017. 18 p.Research output: Chapter in book/report/conference proceeding › Conference contribution › Research
- Published
COTS - Harsh condition effects considerations from technology to user level
Weide-Zaage, K. & Payá-Vayá, G., 2017, In: Advances in Science, Technology and Engineering Systems. 2, 3, p. 1592-1598 7 p.Research output: Contribution to journal › Article › Research › peer review
- Published
Drahtlos gekoppelte Sensoreinheiten für das Monitoring von organischen Kultivierungsprozessen in Tissue Engineering Bioreaktoren
Leibold, C., 2017, 1. Auflage ed.Research output: Thesis › Doctoral thesis
- Published
FLINT plus : A Runtime-Configurable Emulation-Based Stochastic Timing Analysis Framework
Weissbrich, M., Paya-Vaya, G., Gerlach, L., Blume, H., Najafi, A. & Garcia-Ortiz, A., 2017, In: International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS).Research output: Contribution to journal › Article › Research › peer review
- Published
High-Performance, Energy-efficient Computer Vision for ADAS on Tensilica Vision P6
Behmann, N. & Blume, H. C., 2017.Research output: Contribution to conference › Slides to presentation › Research
- Published
Improving the Processing Performance of a DSP for High Temperature Electronics using Circuit-Level Timing Speculation
Payá Vayá, G., Roskamp, S., Webering, F. & Blume, H. C., 2017.Research output: Contribution to conference › Slides to presentation › Research
- Published
Performance estimation of indoor optical wireless communication systems using OMNeT plus
Pfefferkorn, D., Helmholdt, K. & Blume, H., 2017, In: IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks (CAMAD).Research output: Contribution to journal › Article › Research › peer review
- Published
Teaching VHDL Design to Schoolchildren – A Scalable and Flexible FPGA Framework: A Scalable and Flexible FPGA Framework
Dürre, J. C. & Blume, H. C., 2017.Research output: Contribution to conference › Paper › Research › peer review
- Published
Towards a Common Software/Hardware Methodology for Future Advanced Driver Assistance Systems The DESERVE Approach Preface
Blume, H., 2017, In: River Publishers Series in Transport Technology.Research output: Contribution to journal › Article › Research › peer review
- Published
Wege zum Smartphone: zur Kultur- und Technikgeschichte der Kommunikationsmedien : Begleitbuch zur Ausstellung im Historischen Museum Hannover, 27.09.2017 bis 08.04.2018
Hieber, L., Mathis, W., Titze, A. & Urban, A., 2017, Hannover. (Schriften des Historischen Museums Hannover; vol. Band 45)Research output: Book/Report › Monograph › Research
- 2016
- Published
A General Purpose FPGA-Accelerator with Standard USB 3.0 Interface
Rath, J., Dürre, J. C. & Blume, H. C., 2016. 1 p.Research output: Contribution to conference › Poster › Research