Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings |
| ISBN (elektronisch) | 9783981926378 |
| Publikationsstatus | Veröffentlicht - 2023 |
Publikationsreihe
| Name | Design, automation and test in Europe conference |
|---|---|
| ISSN (Print) | 1530-1591 |
| ISSN (elektronisch) | 1558-1101 |
Abstract
Modern and future AI-based automotive applications, such as autonomous driving, require the efficient real-time processing of huge amounts of data from different sensors, like camera, radar, and LiDAR. In the ZuSE-KI-AVF project, multiple university, and industry partners collaborate to develop a novel massive parallel processor architecture, based on a cus-tomized RISC-V host processor, and an efficient high-performance vertical vector coprocessor. In addition, a software development framework is also provided to efficiently program AI-based sensor processing applications. The proposed processor system was verified and evaluated on a state-of-the-art UltraScale+ FPGA board, reaching a processing performance of up to 126.9 FPS, while executing the YOLO-LITE CNN on 224x224 input images. Further optimizations of the FPGA design and the realization of the processor system on a 22nm FDSOI CMOS technology are planned.
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2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings. 2023. (Design, automation and test in Europe conference).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - ZuSE KI-AVF
T2 - Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving
AU - Thieu, Gia Bao
AU - Gesper, Sven
AU - Payá-Vayá, Guillermo
AU - Riggers, Christoph
AU - Renke, Oliver
AU - Fiedler, Till Niklas
AU - Marten, Jakob
AU - Stuckenberg, Tobias
AU - Blume, Holger
AU - Weis, Christian
AU - Steinert, Lukas
AU - Sudarshan, Chirag
AU - Wehn, Norbert
AU - Reimann, Lennart M.
AU - Leupers, Rainer
AU - Beyer, Michael
AU - Köhler, Daniel
AU - Jauch, Alisa
AU - Borrmann, Jan Micha
AU - Jaberansari, Setareh
AU - Berthold, Tim
AU - Blawat, Meinolf
AU - Kock, Markus
AU - Schewior, Gregor
AU - Benndorf, Jens
AU - Kautz, Frederik
AU - Bluethgen, Hans-Martin
AU - Sauer, Christian
N1 - Funding Information: ACKNOWLEDGMENT The work is supported in part by the German Federal Ministry of Education and Research (BMBF) within the project ZuSE-KI-AVF under contract no. 16ME0379.
PY - 2023
Y1 - 2023
N2 - Modern and future AI-based automotive applications, such as autonomous driving, require the efficient real-time processing of huge amounts of data from different sensors, like camera, radar, and LiDAR. In the ZuSE-KI-AVF project, multiple university, and industry partners collaborate to develop a novel massive parallel processor architecture, based on a cus-tomized RISC-V host processor, and an efficient high-performance vertical vector coprocessor. In addition, a software development framework is also provided to efficiently program AI-based sensor processing applications. The proposed processor system was verified and evaluated on a state-of-the-art UltraScale+ FPGA board, reaching a processing performance of up to 126.9 FPS, while executing the YOLO-LITE CNN on 224x224 input images. Further optimizations of the FPGA design and the realization of the processor system on a 22nm FDSOI CMOS technology are planned.
AB - Modern and future AI-based automotive applications, such as autonomous driving, require the efficient real-time processing of huge amounts of data from different sensors, like camera, radar, and LiDAR. In the ZuSE-KI-AVF project, multiple university, and industry partners collaborate to develop a novel massive parallel processor architecture, based on a cus-tomized RISC-V host processor, and an efficient high-performance vertical vector coprocessor. In addition, a software development framework is also provided to efficiently program AI-based sensor processing applications. The proposed processor system was verified and evaluated on a state-of-the-art UltraScale+ FPGA board, reaching a processing performance of up to 126.9 FPS, while executing the YOLO-LITE CNN on 224x224 input images. Further optimizations of the FPGA design and the realization of the processor system on a 22nm FDSOI CMOS technology are planned.
KW - AI acceleration
KW - ASIC
KW - FPGA
KW - RISC-V
KW - hardware-software system
KW - sensor processing
KW - vertical vector processor
UR - http://www.scopus.com/inward/record.url?scp=85162648667&partnerID=8YFLogxK
U2 - 10.23919/date56975.2023.10136978
DO - 10.23919/date56975.2023.10136978
M3 - Conference contribution
SN - 979-8-3503-9624-9
T3 - Design, automation and test in Europe conference
BT - 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings
ER -