Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2017 27th International Conference on Field Programmable Logic and Applications (FPL) |
| Herausgeber/-innen | Diana Gohringer, Dirk Stroobandt, Nele Mentens, Marco Santambrogio, Jari Nurmi |
| Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (elektronisch) | 9789090304281 |
| Publikationsstatus | Veröffentlicht - 2017 |
| Veranstaltung | 27th International Conference on Field Programmable Logic and Applications, FPL 2017 - Gent, Belgien Dauer: 4 Sept. 2017 → 6 Sept. 2017 |
Publikationsreihe
| Name | International Conference on Field-programmable Logic and Applications |
|---|
Abstract
This paper proposes a new synthesizable oscillator-based temperature sensor with minimal footprint for use in contemporary Xilinx FPGA devices. In contrast to previously published ring-oscillator architectures, based on inverters mapped onto single LUTs, the proposed oscillator uses an asynchronous Gray-coded 4-bit counter requiring only two 6-input LUTs. Due to its reduced hardware requirements, the feedback path can be implemented using local routing signals only. Therefore, the impact of the routing on the oscillator frequency is slightly reduced making the oscillator less prone to placement-caused routing deviations. The proposed temperature sensor is calibrated using a two-point calibration approach, resulting in a mean accuracy of ±0.71° C with a mean resolution of 0.0081° C. As a further case study, a methodology to characterize on-chip semiconductor variations between identical FPGAs and within the same FPGA chip is presented using a sensor array, including up to 196 of the proposed two-LUT-based oscillators.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Computernetzwerke und -kommunikation
- Informatik (insg.)
- Angewandte Informatik
- Informatik (insg.)
- Hardware und Architektur
- Informatik (insg.)
- Software
Zitieren
- Standard
- Harvard
- Apa
- Vancouver
- BibTex
- RIS
2017 27th International Conference on Field Programmable Logic and Applications (FPL). Hrsg. / Diana Gohringer; Dirk Stroobandt; Nele Mentens; Marco Santambrogio; Jari Nurmi. Institute of Electrical and Electronics Engineers Inc., 2017. 8056805 (International Conference on Field-programmable Logic and Applications).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Two-LUT-Based Synthesizable Temperature Sensor for Virtex-6 FPGA Devices
AU - Nolting, Stephan
AU - Liu, Lin
AU - Payá-Vayá, Guillermo
N1 - Publisher Copyright: © 2017 Ghent University. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2017
Y1 - 2017
N2 - This paper proposes a new synthesizable oscillator-based temperature sensor with minimal footprint for use in contemporary Xilinx FPGA devices. In contrast to previously published ring-oscillator architectures, based on inverters mapped onto single LUTs, the proposed oscillator uses an asynchronous Gray-coded 4-bit counter requiring only two 6-input LUTs. Due to its reduced hardware requirements, the feedback path can be implemented using local routing signals only. Therefore, the impact of the routing on the oscillator frequency is slightly reduced making the oscillator less prone to placement-caused routing deviations. The proposed temperature sensor is calibrated using a two-point calibration approach, resulting in a mean accuracy of ±0.71° C with a mean resolution of 0.0081° C. As a further case study, a methodology to characterize on-chip semiconductor variations between identical FPGAs and within the same FPGA chip is presented using a sensor array, including up to 196 of the proposed two-LUT-based oscillators.
AB - This paper proposes a new synthesizable oscillator-based temperature sensor with minimal footprint for use in contemporary Xilinx FPGA devices. In contrast to previously published ring-oscillator architectures, based on inverters mapped onto single LUTs, the proposed oscillator uses an asynchronous Gray-coded 4-bit counter requiring only two 6-input LUTs. Due to its reduced hardware requirements, the feedback path can be implemented using local routing signals only. Therefore, the impact of the routing on the oscillator frequency is slightly reduced making the oscillator less prone to placement-caused routing deviations. The proposed temperature sensor is calibrated using a two-point calibration approach, resulting in a mean accuracy of ±0.71° C with a mean resolution of 0.0081° C. As a further case study, a methodology to characterize on-chip semiconductor variations between identical FPGAs and within the same FPGA chip is presented using a sensor array, including up to 196 of the proposed two-LUT-based oscillators.
KW - FPGA
KW - Gray-Counter
KW - Synthesizable Temperature Sensor
KW - Very Small Footprint
UR - http://www.scopus.com/inward/record.url?scp=85034418104&partnerID=8YFLogxK
U2 - 10.23919/FPL.2017.8056805
DO - 10.23919/FPL.2017.8056805
M3 - Conference contribution
AN - SCOPUS:85034418104
T3 - International Conference on Field-programmable Logic and Applications
BT - 2017 27th International Conference on Field Programmable Logic and Applications (FPL)
A2 - Gohringer, Diana
A2 - Stroobandt, Dirk
A2 - Mentens, Nele
A2 - Santambrogio, Marco
A2 - Nurmi, Jari
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 27th International Conference on Field Programmable Logic and Applications, FPL 2017
Y2 - 4 September 2017 through 6 September 2017
ER -