Details
| Originalsprache | Englisch |
|---|---|
| Seiten (von - bis) | 425-430 |
| Seitenumfang | 6 |
| Fachzeitschrift | Solar Energy Materials and Solar Cells |
| Jahrgang | 185 |
| Frühes Online-Datum | 7 Juni 2018 |
| Publikationsstatus | Veröffentlicht - Okt. 2018 |
Abstract
Carrier selective junctions using a poly-silicon/ silicon oxide stack on crystalline silicon feature low recombination currents J0 whilst allowing for low contact resistivity ρC. We describe the limiting current transport mechanism as a combination of homogeneous tunneling through the interfacial silicon oxide layer and transport through pinholes where the interfacial silicon oxide layer is locally disrupted. We present an experimental method and its theoretical basis to discriminate between homogenous tunneling and local pinhole transport mechanisms on n + /n or p + /p junctions by measuring the temperature-dependent contact resistance. Theory predicts opposing trends for the temperature dependencies of tunneling and pinhole transport. This allows identifying the dominant transport path. For the contact resistance of two differently prepared poly-Si/ silicon oxide/ c-Si junctions we either find clear pinhole-type or clear tunneling-type temperature dependence. Pinhole transport contributes more than 94% to the total current for the sample with a 2.1 nm-thick interfacial silicon oxide that we anneal at a temperature of 1050 °C to achieve highest selectivity. In contrast pinhole transport contributes less than 35 % to the total current for the sample with a 1.7 nm-thick silicon oxide that we annealed at only 700 °C in order to avoid pinholes.
ASJC Scopus Sachgebiete
- Werkstoffwissenschaften (insg.)
- Elektronische, optische und magnetische Materialien
- Energie (insg.)
- Erneuerbare Energien, Nachhaltigkeit und Umwelt
- Werkstoffwissenschaften (insg.)
- Oberflächen, Beschichtungen und Folien
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in: Solar Energy Materials and Solar Cells, Jahrgang 185, 10.2018, S. 425-430.
Publikation: Beitrag in Fachzeitschrift › Artikel › Forschung › Peer-Review
}
TY - JOUR
T1 - Temperature-dependent contact resistance of carrier selective Poly-Si on oxide junctions
AU - Folchert, Nils
AU - Rienäcker, Michael
AU - Yeo, A. A.
AU - Min, Byungsul
AU - Peibst, Robby
AU - Brendel, Rolf
N1 - Publisher Copyright: © 2018 Elsevier B.V. Copyright: Copyright 2018 Elsevier B.V., All rights reserved.
PY - 2018/10
Y1 - 2018/10
N2 - Carrier selective junctions using a poly-silicon/ silicon oxide stack on crystalline silicon feature low recombination currents J0 whilst allowing for low contact resistivity ρC. We describe the limiting current transport mechanism as a combination of homogeneous tunneling through the interfacial silicon oxide layer and transport through pinholes where the interfacial silicon oxide layer is locally disrupted. We present an experimental method and its theoretical basis to discriminate between homogenous tunneling and local pinhole transport mechanisms on n + /n or p + /p junctions by measuring the temperature-dependent contact resistance. Theory predicts opposing trends for the temperature dependencies of tunneling and pinhole transport. This allows identifying the dominant transport path. For the contact resistance of two differently prepared poly-Si/ silicon oxide/ c-Si junctions we either find clear pinhole-type or clear tunneling-type temperature dependence. Pinhole transport contributes more than 94% to the total current for the sample with a 2.1 nm-thick interfacial silicon oxide that we anneal at a temperature of 1050 °C to achieve highest selectivity. In contrast pinhole transport contributes less than 35 % to the total current for the sample with a 1.7 nm-thick silicon oxide that we annealed at only 700 °C in order to avoid pinholes.
AB - Carrier selective junctions using a poly-silicon/ silicon oxide stack on crystalline silicon feature low recombination currents J0 whilst allowing for low contact resistivity ρC. We describe the limiting current transport mechanism as a combination of homogeneous tunneling through the interfacial silicon oxide layer and transport through pinholes where the interfacial silicon oxide layer is locally disrupted. We present an experimental method and its theoretical basis to discriminate between homogenous tunneling and local pinhole transport mechanisms on n + /n or p + /p junctions by measuring the temperature-dependent contact resistance. Theory predicts opposing trends for the temperature dependencies of tunneling and pinhole transport. This allows identifying the dominant transport path. For the contact resistance of two differently prepared poly-Si/ silicon oxide/ c-Si junctions we either find clear pinhole-type or clear tunneling-type temperature dependence. Pinhole transport contributes more than 94% to the total current for the sample with a 2.1 nm-thick interfacial silicon oxide that we anneal at a temperature of 1050 °C to achieve highest selectivity. In contrast pinhole transport contributes less than 35 % to the total current for the sample with a 1.7 nm-thick silicon oxide that we annealed at only 700 °C in order to avoid pinholes.
KW - Contact resistance
KW - Passivating contacts
KW - Pinhole transport
KW - POLO
KW - Poly-Si
KW - Selective contacts
KW - Transfer-length-method
KW - Tunneling
UR - http://www.scopus.com/inward/record.url?scp=85048153586&partnerID=8YFLogxK
U2 - 10.1016/j.solmat.2018.05.046
DO - 10.1016/j.solmat.2018.05.046
M3 - Article
AN - SCOPUS:85048153586
VL - 185
SP - 425
EP - 430
JO - Solar Energy Materials and Solar Cells
JF - Solar Energy Materials and Solar Cells
SN - 0927-0248
ER -