System level HW/SW partitioning and optimization tool

Publikation: KonferenzbeitragPaperForschungPeer-Review

Autoren

  • M. Schwiegershausen
  • H. Kropp
  • P. Pirsch
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Details

OriginalspracheEnglisch
Seiten120-125
Seitenumfang6
PublikationsstatusVeröffentlicht - 1996
Veranstaltung1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition - Geneva, Schweiz
Dauer: 16 Sept. 199620 Sept. 1996

Konferenz

Konferenz1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition
Land/GebietSchweiz
OrtGeneva
Zeitraum16 Sept. 199620 Sept. 1996

Abstract

This paper presents a system level HW/SW partitioning methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. Starting from modelling of the signal processing scheme and of the available processor resources, performance and expense measures are estimated for a finite set of processor modules. Based on these measurements, a numerical optimization can be carried out by using mixed integer linear programming as mathematical framework, leading to a heterogeneous system, which is optimal in terms of area expense and throughput rate.

ASJC Scopus Sachgebiete

Zitieren

System level HW/SW partitioning and optimization tool. / Schwiegershausen, M.; Kropp, H.; Pirsch, P.
1996. 120-125 Beitrag in 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Schweiz.

Publikation: KonferenzbeitragPaperForschungPeer-Review

Schwiegershausen, M, Kropp, H & Pirsch, P 1996, 'System level HW/SW partitioning and optimization tool', Beitrag in 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Schweiz, 16 Sept. 1996 - 20 Sept. 1996 S. 120-125.
Schwiegershausen, M., Kropp, H., & Pirsch, P. (1996). System level HW/SW partitioning and optimization tool. 120-125. Beitrag in 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Schweiz.
Schwiegershausen M, Kropp H, Pirsch P. System level HW/SW partitioning and optimization tool. 1996. Beitrag in 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Schweiz.
Schwiegershausen, M. ; Kropp, H. ; Pirsch, P. / System level HW/SW partitioning and optimization tool. Beitrag in 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Schweiz.6 S.
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