Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Autoren

Externe Organisationen

  • X-FAB Silicon Foundries SE
Forschungs-netzwerk anzeigen

Details

OriginalspracheEnglisch
Titel des Sammelwerks2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017
Herausgeber (Verlag)Institute of Electrical and Electronics Engineers Inc.
ISBN (elektronisch)9781509043446
PublikationsstatusVeröffentlicht - 10 Mai 2017
Veranstaltung18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017 - Dresden, Deutschland
Dauer: 3 Apr. 20175 Apr. 2017

Abstract

The metal layout design influences the reliability of the metallization in semiconductor products. An optimized design of the interconnect stack can help to reduce the incidence of dielectric and passivation cracking during Joule heating of the metallization in semiconductor back end of line (BEOL) structures. The elements of the metal stack have different material properties. Thermal stress from Joule heating can cause mismatch in thermal expansion between the materials. This can lead to high stress gradients. The paper shows the comparison of the standard design versus the Highly Robust (HiRo) metallization layout. The evaluation is done for an AlCu metallization with W-plugs in a 180 nm technology node with a metal stack with thick metal (∼3 μm thick) on top. The simulation results show better protection against thermal stress caused by Joule heating for the HiRo-layout.

ASJC Scopus Sachgebiete

Zitieren

Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks. / Sethu, Raj Sekar; Hein, Verena; Erstling, Marco et al.
2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7926226.

Publikation: Beitrag in Buch/Bericht/Sammelwerk/KonferenzbandAufsatz in KonferenzbandForschungPeer-Review

Sethu, RS, Hein, V, Erstling, M & Weide-Zaage, K 2017, Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks. in 2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017., 7926226, Institute of Electrical and Electronics Engineers Inc., 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017, Dresden, Deutschland, 3 Apr. 2017. https://doi.org/10.1109/eurosime.2017.7926226
Sethu, R. S., Hein, V., Erstling, M., & Weide-Zaage, K. (2017). Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks. In 2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017 Artikel 7926226 Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/eurosime.2017.7926226
Sethu RS, Hein V, Erstling M, Weide-Zaage K. Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks. in 2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7926226 doi: 10.1109/eurosime.2017.7926226
Sethu, Raj Sekar ; Hein, Verena ; Erstling, Marco et al. / Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks. 2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017. Institute of Electrical and Electronics Engineers Inc., 2017.
Download
@inproceedings{d825783fd85b4448bbc6f0c607cd07f3,
title = "Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks",
abstract = "The metal layout design influences the reliability of the metallization in semiconductor products. An optimized design of the interconnect stack can help to reduce the incidence of dielectric and passivation cracking during Joule heating of the metallization in semiconductor back end of line (BEOL) structures. The elements of the metal stack have different material properties. Thermal stress from Joule heating can cause mismatch in thermal expansion between the materials. This can lead to high stress gradients. The paper shows the comparison of the standard design versus the Highly Robust (HiRo) metallization layout. The evaluation is done for an AlCu metallization with W-plugs in a 180 nm technology node with a metal stack with thick metal (∼3 μm thick) on top. The simulation results show better protection against thermal stress caused by Joule heating for the HiRo-layout.",
author = "Sethu, {Raj Sekar} and Verena Hein and Marco Erstling and Kirsten Weide-Zaage",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.; 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017 ; Conference date: 03-04-2017 Through 05-04-2017",
year = "2017",
month = may,
day = "10",
doi = "10.1109/eurosime.2017.7926226",
language = "English",
booktitle = "2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
address = "United States",

}

Download

TY - GEN

T1 - Simulation investigations for the comparison of standard and highly robust AlCu thick metal tracks

AU - Sethu, Raj Sekar

AU - Hein, Verena

AU - Erstling, Marco

AU - Weide-Zaage, Kirsten

N1 - Publisher Copyright: © 2017 IEEE. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.

PY - 2017/5/10

Y1 - 2017/5/10

N2 - The metal layout design influences the reliability of the metallization in semiconductor products. An optimized design of the interconnect stack can help to reduce the incidence of dielectric and passivation cracking during Joule heating of the metallization in semiconductor back end of line (BEOL) structures. The elements of the metal stack have different material properties. Thermal stress from Joule heating can cause mismatch in thermal expansion between the materials. This can lead to high stress gradients. The paper shows the comparison of the standard design versus the Highly Robust (HiRo) metallization layout. The evaluation is done for an AlCu metallization with W-plugs in a 180 nm technology node with a metal stack with thick metal (∼3 μm thick) on top. The simulation results show better protection against thermal stress caused by Joule heating for the HiRo-layout.

AB - The metal layout design influences the reliability of the metallization in semiconductor products. An optimized design of the interconnect stack can help to reduce the incidence of dielectric and passivation cracking during Joule heating of the metallization in semiconductor back end of line (BEOL) structures. The elements of the metal stack have different material properties. Thermal stress from Joule heating can cause mismatch in thermal expansion between the materials. This can lead to high stress gradients. The paper shows the comparison of the standard design versus the Highly Robust (HiRo) metallization layout. The evaluation is done for an AlCu metallization with W-plugs in a 180 nm technology node with a metal stack with thick metal (∼3 μm thick) on top. The simulation results show better protection against thermal stress caused by Joule heating for the HiRo-layout.

UR - http://www.scopus.com/inward/record.url?scp=85020230707&partnerID=8YFLogxK

U2 - 10.1109/eurosime.2017.7926226

DO - 10.1109/eurosime.2017.7926226

M3 - Conference contribution

AN - SCOPUS:85020230707

BT - 2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2017

Y2 - 3 April 2017 through 5 April 2017

ER -

Von denselben Autoren