Signal integrity problems in deep submicron arising from interconnects between cores

Publikation: Konferenzbeitrag › Paper › Forschung › Peer-Review

Autoren

  • P. Nordholz
  • D. Treytnar
  • J. Otterstedt
  • H. Grabinski
  • D. Niggemeyer
  • T. W. Williams

Organisationseinheiten

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Details

OriginalspracheEnglisch
Seiten28-33
Seitenumfang6
PublikationsstatusVeröffentlicht - 1998
Veranstaltung1998 16th IEEE VLSI Test Symposium - Monterey, USA / Vereinigte Staaten
Dauer: 26 Apr. 1998 → 30 Apr. 1998

Konferenz

Konferenz1998 16th IEEE VLSI Test Symposium
Land/GebietUSA / Vereinigte Staaten
OrtMonterey
Zeitraum26 Apr. 1998 → 30 Apr. 1998

Abstract

The SIA Roadmap shows a very aggressive drive to deep submicron designs. A significant corner stone in the industries' ability to utilize this tremendous capabilities is the usage of reusable cores. When employing cores, one must be sensitive to the quality of the interconnects which will carry signals between cores and the ASIC portion of the network. In this work we will use an extremely accurate line simulator which solves the transmission line equations derived from Maxwell's equations for the simulation of line systems. We will show that the coupling between bus lines is significant, since the signal delay can be increased and even hazards can occur. Furthermore, these effects depend on the set of input signals of all bus lines and the skew between the individual input signals. The lines' cross sections are taken from the SIA Roadmap going from 0.35 μm technology design down to 0.10 μm technology design.

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Signal integrity problems in deep submicron arising from interconnects between cores. / Nordholz, P.; Treytnar, D.; Otterstedt, J. et al.
1998. 28-33 Beitrag in 1998 16th IEEE VLSI Test Symposium, Monterey, California, USA / Vereinigte Staaten.

Publikation: Konferenzbeitrag › Paper › Forschung › Peer-Review

Nordholz, P, Treytnar, D, Otterstedt, J, Grabinski, H, Niggemeyer, D & Williams, TW 1998, 'Signal integrity problems in deep submicron arising from interconnects between cores', Beitrag in 1998 16th IEEE VLSI Test Symposium, Monterey, USA / Vereinigte Staaten, 26 Apr. 1998 - 30 Apr. 1998 S. 28-33. https://doi.org/10.1109/VTEST.1998.670845
Nordholz, P., Treytnar, D., Otterstedt, J., Grabinski, H., Niggemeyer, D., & Williams, T. W. (1998). Signal integrity problems in deep submicron arising from interconnects between cores. 28-33. Beitrag in 1998 16th IEEE VLSI Test Symposium, Monterey, California, USA / Vereinigte Staaten. https://doi.org/10.1109/VTEST.1998.670845
Nordholz P, Treytnar D, Otterstedt J, Grabinski H, Niggemeyer D, Williams TW. Signal integrity problems in deep submicron arising from interconnects between cores. 1998. Beitrag in 1998 16th IEEE VLSI Test Symposium, Monterey, California, USA / Vereinigte Staaten. doi: 10.1109/VTEST.1998.670845
Nordholz, P. ; Treytnar, D. ; Otterstedt, J. et al. / Signal integrity problems in deep submicron arising from interconnects between cores. Beitrag in 1998 16th IEEE VLSI Test Symposium, Monterey, California, USA / Vereinigte Staaten.6 S.
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