Details
Originalsprache | Englisch |
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Titel des Sammelwerks | Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 |
Herausgeber (Verlag) | IEEE Computer Society |
Seiten | 1187-1190 |
Seitenumfang | 4 |
ISBN (Print) | 1424410177, 9781424410170 |
Publikationsstatus | Veröffentlicht - 2007 |
Veranstaltung | IEEE International Conference onMultimedia and Expo, ICME 2007 - Beijing, China Dauer: 2 Juli 2007 → 5 Juli 2007 |
Publikationsreihe
Name | Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 |
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Abstract
Video encoding IP for home entertainment equipment and mobile devices is based on the same compression standards. However, performance and power efficient implementations for both application fields usually lead to independent hardware architectures and require separate implementation and maintenance. We introduce a new approach for a multistandard texture encoder for MPEG and VC-1 compression standards. The data path based architecture has been designed for scalability of performance and chip size without the requirement of manual hardware modifications. Using the maximum supported number of eight data paths running at 108 MHz, the texture encoder is able to process D1 video sequences.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Computergrafik und computergestütztes Design
- Informatik (insg.)
- Software
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- BibTex
- RIS
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007. IEEE Computer Society, 2007. S. 1187-1190 4284868 (Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Scalable multi-standard LSI texture encoder for MPEG and VC-1 video compression
AU - Nolte, N.
AU - Gehrke, W.
AU - Wiczinowski, F.
AU - Pirsch, P.
PY - 2007
Y1 - 2007
N2 - Video encoding IP for home entertainment equipment and mobile devices is based on the same compression standards. However, performance and power efficient implementations for both application fields usually lead to independent hardware architectures and require separate implementation and maintenance. We introduce a new approach for a multistandard texture encoder for MPEG and VC-1 compression standards. The data path based architecture has been designed for scalability of performance and chip size without the requirement of manual hardware modifications. Using the maximum supported number of eight data paths running at 108 MHz, the texture encoder is able to process D1 video sequences.
AB - Video encoding IP for home entertainment equipment and mobile devices is based on the same compression standards. However, performance and power efficient implementations for both application fields usually lead to independent hardware architectures and require separate implementation and maintenance. We introduce a new approach for a multistandard texture encoder for MPEG and VC-1 compression standards. The data path based architecture has been designed for scalability of performance and chip size without the requirement of manual hardware modifications. Using the maximum supported number of eight data paths running at 108 MHz, the texture encoder is able to process D1 video sequences.
UR - http://www.scopus.com/inward/record.url?scp=46449087968&partnerID=8YFLogxK
U2 - 10.1109/icme.2007.4284868
DO - 10.1109/icme.2007.4284868
M3 - Conference contribution
AN - SCOPUS:46449087968
SN - 1424410177
SN - 9781424410170
T3 - Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007
SP - 1187
EP - 1190
BT - Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007
PB - IEEE Computer Society
T2 - IEEE International Conference onMultimedia and Expo, ICME 2007
Y2 - 2 July 2007 through 5 July 2007
ER -