Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS) |
| Seiten | 37-47 |
| Seitenumfang | 11 |
| ISBN (elektronisch) | 978-1-4799-4829-1 |
| Publikationsstatus | Veröffentlicht - 19 Jan. 2015 |
| Extern publiziert | Ja |
| Veranstaltung | 2014 20th IEEE Real Time and Embedded Technology and Applications Symposium, RTAS 2014 - Berlin, Deutschland Dauer: 15 Apr. 2014 → 17 Apr. 2014 |
Publikationsreihe
| Name | Real-Time Technology and Applications - Proceedings |
|---|---|
| ISSN (Print) | 1080-1812 |
Abstract
The goal of the SLOTH family of operating system kernels is to provide a unified priority space to the real-time applications. By automated mapping of tasks to interrupts, we eliminate rate-monotonic priority inversion and increase execution determinism. In its standard implementation, however, SLOTH has been criticized for being unsafe, since interrupt service routines are executed in supervisor mode. SAFER SLOTH mitigates this shortcoming - while keeping the favorable properties of SLOTH - and provides a safe and isolated execution environment for application tasks. Adopting the SLOTH philosophy of embracing and exploiting hardware particularities, its generative approach automatically tailors the system to both the application and the target architecture. We achieve efficient MPU-based memory protection at reduced latency and low performance overhead by leveraging code inlining and compiler optimizations. In comparison to a commercial AUTOSAR OS, SAFER SLOTH achieves speedups between 8x (worst case) and 23x (best case) on kernel latencies while retaining the SLOTH advantages of strict priority obedience, excellent determinism and small memory footprints.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Computernetzwerke und -kommunikation
- Informatik (insg.)
- Hardware und Architektur
- Informatik (insg.)
- Software
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2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS). 2015. S. 37-47 (Real-Time Technology and Applications - Proceedings).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - SAFER SLOTH: Efficient, Hardware-Tailored Memory Protection
AU - Danner, Daniel
AU - Müller, Rainer
AU - Schröder-Preikschat, Wolfgang
AU - Hofer, Wanja
AU - Lohmann, Daniel
PY - 2015/1/19
Y1 - 2015/1/19
N2 - The goal of the SLOTH family of operating system kernels is to provide a unified priority space to the real-time applications. By automated mapping of tasks to interrupts, we eliminate rate-monotonic priority inversion and increase execution determinism. In its standard implementation, however, SLOTH has been criticized for being unsafe, since interrupt service routines are executed in supervisor mode. SAFER SLOTH mitigates this shortcoming - while keeping the favorable properties of SLOTH - and provides a safe and isolated execution environment for application tasks. Adopting the SLOTH philosophy of embracing and exploiting hardware particularities, its generative approach automatically tailors the system to both the application and the target architecture. We achieve efficient MPU-based memory protection at reduced latency and low performance overhead by leveraging code inlining and compiler optimizations. In comparison to a commercial AUTOSAR OS, SAFER SLOTH achieves speedups between 8x (worst case) and 23x (best case) on kernel latencies while retaining the SLOTH advantages of strict priority obedience, excellent determinism and small memory footprints.
AB - The goal of the SLOTH family of operating system kernels is to provide a unified priority space to the real-time applications. By automated mapping of tasks to interrupts, we eliminate rate-monotonic priority inversion and increase execution determinism. In its standard implementation, however, SLOTH has been criticized for being unsafe, since interrupt service routines are executed in supervisor mode. SAFER SLOTH mitigates this shortcoming - while keeping the favorable properties of SLOTH - and provides a safe and isolated execution environment for application tasks. Adopting the SLOTH philosophy of embracing and exploiting hardware particularities, its generative approach automatically tailors the system to both the application and the target architecture. We achieve efficient MPU-based memory protection at reduced latency and low performance overhead by leveraging code inlining and compiler optimizations. In comparison to a commercial AUTOSAR OS, SAFER SLOTH achieves speedups between 8x (worst case) and 23x (best case) on kernel latencies while retaining the SLOTH advantages of strict priority obedience, excellent determinism and small memory footprints.
UR - http://www.scopus.com/inward/record.url?scp=84937549354&partnerID=8YFLogxK
U2 - 10.1109/RTAS.2014.6925989
DO - 10.1109/RTAS.2014.6925989
M3 - Conference contribution
AN - SCOPUS:84937549354
SN - 978-1-4799-4691-4
T3 - Real-Time Technology and Applications - Proceedings
SP - 37
EP - 47
BT - 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)
T2 - 2014 20th IEEE Real Time and Embedded Technology and Applications Symposium, RTAS 2014
Y2 - 15 April 2014 through 17 April 2014
ER -