Details
| Originalsprache | Englisch |
|---|---|
| Seiten (von - bis) | 259-265 |
| Seitenumfang | 7 |
| Fachzeitschrift | Microelectronics reliability |
| Jahrgang | 64 |
| Publikationsstatus | Veröffentlicht - 1 Sept. 2016 |
Abstract
The typical via layout in CMOS technology with AlCu-metallizations and tungsten via is cylindrical. Common vias have a size as small as possible in the related process. More challenging application, temperature and mission profiles require higher robustness of a metallization [1,2]. Via arrays of small common vias are in use to the transfer of higher currents [3]. But the typical via array layout is not the best layout for applications which are faced to high mechanical stress because via arrays metal layer connections make these parts in the stack inflexible. The developed so called highly robust metallization is optimized for applications with extended operating conditions regarding higher currents and temperatures as well as mechanical stress [4]. Donut-Vias are elements of the highly robust metallization for the interconnection of highly robust metal lines. The paper shows the layout of a Donut-Via and explains the benefits and limits of the new layout by simulation and test results.
ASJC Scopus Sachgebiete
- Werkstoffwissenschaften (insg.)
- Elektronische, optische und magnetische Materialien
- Physik und Astronomie (insg.)
- Atom- und Molekularphysik sowie Optik
- Ingenieurwesen (insg.)
- Sicherheit, Risiko, Zuverlässigkeit und Qualität
- Physik und Astronomie (insg.)
- Physik der kondensierten Materie
- Werkstoffwissenschaften (insg.)
- Oberflächen, Beschichtungen und Folien
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
Zitieren
- Standard
- Harvard
- Apa
- Vancouver
- BibTex
- RIS
in: Microelectronics reliability, Jahrgang 64, 01.09.2016, S. 259-265.
Publikation: Beitrag in Fachzeitschrift › Artikel › Forschung › Peer-Review
}
TY - JOUR
T1 - Reliability evaluation of tungsten donut-via as an element of the highly robust metallization
AU - Hein, Verena
AU - Erstling, Marco
AU - Sethu, Raj Sekar
AU - Weide-Zaage, Kirsten
AU - Bai, Tianlin
N1 - Publisher Copyright: © 2016 Elsevier Ltd Copyright: Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2016/9/1
Y1 - 2016/9/1
N2 - The typical via layout in CMOS technology with AlCu-metallizations and tungsten via is cylindrical. Common vias have a size as small as possible in the related process. More challenging application, temperature and mission profiles require higher robustness of a metallization [1,2]. Via arrays of small common vias are in use to the transfer of higher currents [3]. But the typical via array layout is not the best layout for applications which are faced to high mechanical stress because via arrays metal layer connections make these parts in the stack inflexible. The developed so called highly robust metallization is optimized for applications with extended operating conditions regarding higher currents and temperatures as well as mechanical stress [4]. Donut-Vias are elements of the highly robust metallization for the interconnection of highly robust metal lines. The paper shows the layout of a Donut-Via and explains the benefits and limits of the new layout by simulation and test results.
AB - The typical via layout in CMOS technology with AlCu-metallizations and tungsten via is cylindrical. Common vias have a size as small as possible in the related process. More challenging application, temperature and mission profiles require higher robustness of a metallization [1,2]. Via arrays of small common vias are in use to the transfer of higher currents [3]. But the typical via array layout is not the best layout for applications which are faced to high mechanical stress because via arrays metal layer connections make these parts in the stack inflexible. The developed so called highly robust metallization is optimized for applications with extended operating conditions regarding higher currents and temperatures as well as mechanical stress [4]. Donut-Vias are elements of the highly robust metallization for the interconnection of highly robust metal lines. The paper shows the layout of a Donut-Via and explains the benefits and limits of the new layout by simulation and test results.
KW - AlCu-metallization
KW - Design
KW - Donut-via
KW - High temperature
KW - Interconnect reliability
KW - Robustness
UR - http://www.scopus.com/inward/record.url?scp=84991706390&partnerID=8YFLogxK
U2 - 10.1016/j.microrel.2016.07.136
DO - 10.1016/j.microrel.2016.07.136
M3 - Article
AN - SCOPUS:84991706390
VL - 64
SP - 259
EP - 265
JO - Microelectronics reliability
JF - Microelectronics reliability
SN - 0026-2714
ER -