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Realization of an in-plane-gate single-electron transistor

Publikation: Beitrag in FachzeitschriftArtikelForschungPeer-Review

Autorschaft

  • H. Pothier
  • J. Weis
  • R. J. Haug
  • K. V. Klitzing

Externe Organisationen

  • Max-Planck-Institut für Festkörperforschung
  • Paul-Drude-Institut für Festkörperelektronik (PDI)
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Details

OriginalspracheEnglisch
Seiten (von - bis)3174-3176
Seitenumfang3
FachzeitschriftApplied physics letters
Jahrgang62
Ausgabenummer24
PublikationsstatusVeröffentlicht - 1 Dez. 1993
Extern publiziertJa

Abstract

By etching narrow trenches in an AlGaAs/GaAs heterostructure and defining a channel and six in-plane gates in the two-dimensional electron gas, a single-electron transistor is produced in a simple way. As expected from charging effects, the conductivity of the transistor oscillates with the voltage on each gate. However, in contrast to metallic devices or heterostructure devices with metallic top gates, the voltage dependent depletion of the gates themselves leads to changes in the period of the oscillations.

ASJC Scopus Sachgebiete

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Realization of an in-plane-gate single-electron transistor. / Pothier, H.; Weis, J.; Haug, R. J. et al.
in: Applied physics letters, Jahrgang 62, Nr. 24, 01.12.1993, S. 3174-3176.

Publikation: Beitrag in FachzeitschriftArtikelForschungPeer-Review

Pothier, H, Weis, J, Haug, RJ, Klitzing, KV & Ploog, K 1993, 'Realization of an in-plane-gate single-electron transistor', Applied physics letters, Jg. 62, Nr. 24, S. 3174-3176. https://doi.org/10.1063/1.109120
Pothier H, Weis J, Haug RJ, Klitzing KV, Ploog K. Realization of an in-plane-gate single-electron transistor. Applied physics letters. 1993 Dez 1;62(24):3174-3176. doi: 10.1063/1.109120
Pothier, H. ; Weis, J. ; Haug, R. J. et al. / Realization of an in-plane-gate single-electron transistor. in: Applied physics letters. 1993 ; Jahrgang 62, Nr. 24. S. 3174-3176.
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