Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | Parallel Computing |
| Untertitel | Architectures, Algorithms and Applications |
| Herausgeber/-innen | C. Bischof, M. Bücker, P. Gibbon, G.R. Joubert, T. Lippert, B. Mohr, F. Peters |
| Herausgeber (Verlag) | IOS Press |
| Seiten | 777-784 |
| Seitenumfang | 8 |
| ISBN (Print) | 978-1-58603-796-3 |
| Publikationsstatus | Veröffentlicht - 2008 |
| Extern publiziert | Ja |
Publikationsreihe
| Name | Advances in Parallel Computing |
|---|---|
| Band | 15 |
| ISSN (Print) | 0927-5452 |
Abstract
Field Programmable Gate Array Architectures (FPGA) are known to facilitate efficient implementations of signal processing algorithms. Their computational efficiency for arithmetic datapaths in terms of power and performance is typically ranked better than that of general purpose processors. This paper analyses the efficiency gain for MP3 decoding on an FPGA. The results of an exemplary FPGA implementation of a complete MP3 decoder featuring arithmetic datapaths as well as control overhead are compared concerning performance and power consumption to further implementation alternatives. Furthermore, the results are compared to requirements for a deployment in portable environments.
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Allgemeine Computerwissenschaft
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Parallel Computing: Architectures, Algorithms and Applications. Hrsg. / C. Bischof; M. Bücker; P. Gibbon; G.R. Joubert; T. Lippert; B. Mohr; F. Peters. IOS Press, 2008. S. 777-784 (Advances in Parallel Computing; Band 15).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Programmable Architectures for Realtime Music Decompression
AU - Botteck, Martin
AU - Blume, Holger
AU - Von Livonius, Jörg
AU - Neuenhahn, Martin
AU - Noll, Tobias G.
PY - 2008
Y1 - 2008
N2 - Field Programmable Gate Array Architectures (FPGA) are known to facilitate efficient implementations of signal processing algorithms. Their computational efficiency for arithmetic datapaths in terms of power and performance is typically ranked better than that of general purpose processors. This paper analyses the efficiency gain for MP3 decoding on an FPGA. The results of an exemplary FPGA implementation of a complete MP3 decoder featuring arithmetic datapaths as well as control overhead are compared concerning performance and power consumption to further implementation alternatives. Furthermore, the results are compared to requirements for a deployment in portable environments.
AB - Field Programmable Gate Array Architectures (FPGA) are known to facilitate efficient implementations of signal processing algorithms. Their computational efficiency for arithmetic datapaths in terms of power and performance is typically ranked better than that of general purpose processors. This paper analyses the efficiency gain for MP3 decoding on an FPGA. The results of an exemplary FPGA implementation of a complete MP3 decoder featuring arithmetic datapaths as well as control overhead are compared concerning performance and power consumption to further implementation alternatives. Furthermore, the results are compared to requirements for a deployment in portable environments.
UR - http://www.scopus.com/inward/record.url?scp=84906504402&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84906504402
SN - 978-1-58603-796-3
T3 - Advances in Parallel Computing
SP - 777
EP - 784
BT - Parallel Computing
A2 - Bischof, C.
A2 - Bücker, M.
A2 - Gibbon, P.
A2 - Joubert, G.R.
A2 - Lippert, T.
A2 - Mohr, B.
A2 - Peters, F.
PB - IOS Press
ER -