Details
| Originalsprache | Englisch |
|---|---|
| Seiten (von - bis) | II-192-II-195 |
| Fachzeitschrift | Proceedings - IEEE International Symposium on Circuits and Systems |
| Jahrgang | 2 |
| Publikationsstatus | Veröffentlicht - 2000 |
| Veranstaltung | IEEE 2000 International Symposium on Circuits and Systems, ISCAS 2000 - Geneva, Schweiz Dauer: 28 Mai 2000 → 31 Mai 2000 |
Abstract
M-PIRE is a programmable MPEG-4 multimedia codec VLSI for mobile and stationary applications. It integrates a RISC core, two separate DSPs, a 64-bit dual-issue VLIW macroblock engine, and an autonomous I/O processor on a single chip to cope with the high flexibility and processing demands of the MPEG-4 standard. The first M-PIRE implementation will consume 90 mm2 in 0.25 μ CMOS technology. It will support real-time video and audio processing of MPEG-4 simple profile or ITU H.26× standards; future designs of M-PIRE will add support for higher MPEG-4 profiles. This paper focuses on the architecture, instruction set, and performance of M-PIRE's macroblock engine, which carries most of the workload in MPEG-4 video processing.
ASJC Scopus Sachgebiete
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
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in: Proceedings - IEEE International Symposium on Circuits and Systems, Jahrgang 2, 2000, S. II-192-II-195.
Publikation: Beitrag in Fachzeitschrift › Konferenzaufsatz in Fachzeitschrift › Forschung › Peer-Review
}
TY - JOUR
T1 - M-PIRE MPEG-4 codec DSP and its macroblock engine
AU - Stolberg, H. J.
AU - Berekovic, M.
AU - Pirsch, P.
AU - Runge, H.
AU - Moeller, H.
AU - Kneip, J.
PY - 2000
Y1 - 2000
N2 - M-PIRE is a programmable MPEG-4 multimedia codec VLSI for mobile and stationary applications. It integrates a RISC core, two separate DSPs, a 64-bit dual-issue VLIW macroblock engine, and an autonomous I/O processor on a single chip to cope with the high flexibility and processing demands of the MPEG-4 standard. The first M-PIRE implementation will consume 90 mm2 in 0.25 μ CMOS technology. It will support real-time video and audio processing of MPEG-4 simple profile or ITU H.26× standards; future designs of M-PIRE will add support for higher MPEG-4 profiles. This paper focuses on the architecture, instruction set, and performance of M-PIRE's macroblock engine, which carries most of the workload in MPEG-4 video processing.
AB - M-PIRE is a programmable MPEG-4 multimedia codec VLSI for mobile and stationary applications. It integrates a RISC core, two separate DSPs, a 64-bit dual-issue VLIW macroblock engine, and an autonomous I/O processor on a single chip to cope with the high flexibility and processing demands of the MPEG-4 standard. The first M-PIRE implementation will consume 90 mm2 in 0.25 μ CMOS technology. It will support real-time video and audio processing of MPEG-4 simple profile or ITU H.26× standards; future designs of M-PIRE will add support for higher MPEG-4 profiles. This paper focuses on the architecture, instruction set, and performance of M-PIRE's macroblock engine, which carries most of the workload in MPEG-4 video processing.
UR - http://www.scopus.com/inward/record.url?scp=0033682567&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2000.856291
DO - 10.1109/ISCAS.2000.856291
M3 - Conference article
AN - SCOPUS:0033682567
VL - 2
SP - II-192-II-195
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
SN - 0271-4310
T2 - IEEE 2000 International Symposium on Circuits and Systems, ISCAS 2000
Y2 - 28 May 2000 through 31 May 2000
ER -