TY - JOUR

T1 - Monolithically Integrated GaN Gate Drivers

T2 - A Design Guide

AU - Basler, Michael

AU - Deneke, Niklas

AU - Monch, Stefan

AU - Reiner, Richard

AU - Wicht, Bernhard

AU - Quay, Rudiger

N1 - The authors would like to thank the colleagues from the Fraunhofer IAF Epitaxy and Technology Department for their contributions during wafer growth, IC processing, and characterization. The authors would also like to thank Dirk Meder for packaging the test ICs. German Federal Ministry of Education and Research (Grant Number: 16ME0496)

PY - 2023/7/7

Y1 - 2023/7/7

N2 - In recent years, an increasing trend towards GaN integration can be observed, enabled by the lateral structure of the GaN technology. A key improvement over a discrete implementation is the integration of a monolithic gate driver. This tutorial-style paper aims to give insight into the design flow. It starts with the possibilities of GaN technologies in terms of IC design followed by basic driving principles of GaN HEMTs. Gate loop requirements and recommendations for the gate driver output stage are explained. A flowchart for the design of integrated gate drivers is presented with the boundary constraints from the technology, topology research, and selection using a step-by-step guide. The design flow is run through with an example scenario and the realized gate driver design is optimized for low power consumption and fast switching, which is verified with simulations and measurements. Thus, a guide is given for the design of a monolithically integrated GaN gate driver to further advance, promote, and accelerate integration in GaN.

AB - In recent years, an increasing trend towards GaN integration can be observed, enabled by the lateral structure of the GaN technology. A key improvement over a discrete implementation is the integration of a monolithic gate driver. This tutorial-style paper aims to give insight into the design flow. It starts with the possibilities of GaN technologies in terms of IC design followed by basic driving principles of GaN HEMTs. Gate loop requirements and recommendations for the gate driver output stage are explained. A flowchart for the design of integrated gate drivers is presented with the boundary constraints from the technology, topology research, and selection using a step-by-step guide. The design flow is run through with an example scenario and the realized gate driver design is optimized for low power consumption and fast switching, which is verified with simulations and measurements. Thus, a guide is given for the design of a monolithically integrated GaN gate driver to further advance, promote, and accelerate integration in GaN.

KW - driver circuits

KW - Gallium nitride

KW - Gate drivers

KW - gate drivers

KW - HEMTs

KW - Integrated circuits

KW - Logic gates

KW - MODFETs

KW - monolithic integrated circuits

KW - power integrated circuits

KW - Resistance

UR - http://www.scopus.com/inward/record.url?scp=85163539327&partnerID=8YFLogxK

U2 - 10.1109/OJPEL.2023.3290190

DO - 10.1109/OJPEL.2023.3290190

M3 - Article

AN - SCOPUS:85163539327

VL - 4

SP - 487

EP - 497

JO - IEEE Open Journal of Power Electronics

JF - IEEE Open Journal of Power Electronics

ER -