Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006) |
| Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
| Seiten | 252-261 |
| Seitenumfang | 10 |
| ISBN (Print) | 1-4244-0689-7 |
| Publikationsstatus | Veröffentlicht - 12 Feb. 2007 |
| Extern publiziert | Ja |
| Veranstaltung | 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006 - San Luis Potosi, Mexiko Dauer: 20 Sept. 2006 → 22 Sept. 2006 |
Abstract
Advances in semiconductor technology and ever growing complexity of modern digital systems facilitate the design of novel architectures integrating former self-contained architecture blocks on one die. In this contribution a SoC basically combined of a RISC processor core and an arithmetic oriented eFPGA is modelled, quantitatively analysed and in particular coupling aspects of the eFPGA and the RISC processor core are discussed. These coupling mechanisms are quantitatively evaluated in terms of energy efficiency, area and performance. Furthermore, decisive design parameters for the coupling like the degree of coupling etc. are discussed and compared with other realisations for exemplary operators (DES, median filter).
ASJC Scopus Sachgebiete
- Informatik (insg.)
- Hardware und Architektur
- Informatik (insg.)
- Software
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
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2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006). Institute of Electrical and Electronics Engineers Inc., 2007. S. 252-261.
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA Macros
AU - Von Sydow, T.
AU - Korb, M.
AU - Neumann, B.
AU - Blume, H.
AU - Noll, T. G.
PY - 2007/2/12
Y1 - 2007/2/12
N2 - Advances in semiconductor technology and ever growing complexity of modern digital systems facilitate the design of novel architectures integrating former self-contained architecture blocks on one die. In this contribution a SoC basically combined of a RISC processor core and an arithmetic oriented eFPGA is modelled, quantitatively analysed and in particular coupling aspects of the eFPGA and the RISC processor core are discussed. These coupling mechanisms are quantitatively evaluated in terms of energy efficiency, area and performance. Furthermore, decisive design parameters for the coupling like the degree of coupling etc. are discussed and compared with other realisations for exemplary operators (DES, median filter).
AB - Advances in semiconductor technology and ever growing complexity of modern digital systems facilitate the design of novel architectures integrating former self-contained architecture blocks on one die. In this contribution a SoC basically combined of a RISC processor core and an arithmetic oriented eFPGA is modelled, quantitatively analysed and in particular coupling aspects of the eFPGA and the RISC processor core are discussed. These coupling mechanisms are quantitatively evaluated in terms of energy efficiency, area and performance. Furthermore, decisive design parameters for the coupling like the degree of coupling etc. are discussed and compared with other realisations for exemplary operators (DES, median filter).
UR - http://www.scopus.com/inward/record.url?scp=46449092178&partnerID=8YFLogxK
U2 - 10.1109/RECONF.2006.307777
DO - 10.1109/RECONF.2006.307777
M3 - Conference contribution
AN - SCOPUS:46449092178
SN - 1-4244-0689-7
SP - 252
EP - 261
BT - 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006)
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006
Y2 - 20 September 2006 through 22 September 2006
ER -