Details
| Originalsprache | Englisch |
|---|---|
| Titel des Sammelwerks | 2024 IEEE 34th Australasian Universities Power Engineering Conference, AUPEC 2024 |
| Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (elektronisch) | 9798350377941 |
| ISBN (Print) | 979-8-3503-7795-8 |
| Publikationsstatus | Veröffentlicht - 20 Nov. 2024 |
| Veranstaltung | 34th IEEE Australasian Universities Power Engineering Conference, AUPEC 2024 - Sydney, Australien Dauer: 20 Nov. 2024 → 22 Nov. 2024 |
Publikationsreihe
| Name | Australasian Universities Power Engineering Conference |
|---|---|
| ISSN (Print) | 2474-1493 |
| ISSN (elektronisch) | 2474-1507 |
Abstract
This paper contributes to the goals of memory and time-saving optimization methods based on DC approximations. It presents a superposition method for contingencies based on the superposition method for short-circuit calculations. A case study shows very noticeable advantages of the superposition method with regard to memory and time requirements.
ASJC Scopus Sachgebiete
- Energie (insg.)
- Energieanlagenbau und Kraftwerkstechnik
- Energie (insg.)
- Erneuerbare Energien, Nachhaltigkeit und Umwelt
- Ingenieurwesen (insg.)
- Elektrotechnik und Elektronik
- Mathematik (insg.)
- Steuerung und Optimierung
Ziele für nachhaltige Entwicklung
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- BibTex
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2024 IEEE 34th Australasian Universities Power Engineering Conference, AUPEC 2024. Institute of Electrical and Electronics Engineers Inc., 2024. (Australasian Universities Power Engineering Conference).
Publikation: Beitrag in Buch/Bericht/Sammelwerk/Konferenzband › Aufsatz in Konferenzband › Forschung › Peer-Review
}
TY - GEN
T1 - Memory and time savings by superposition of DC-modeled contingencies in grid optimization
AU - Leveringhaus, Thomas
AU - Waßmann, Julian
AU - Stark, Lars
AU - Hofmann, Lutz
N1 - Publisher Copyright: © 2024 IEEE.
PY - 2024/11/20
Y1 - 2024/11/20
N2 - This paper contributes to the goals of memory and time-saving optimization methods based on DC approximations. It presents a superposition method for contingencies based on the superposition method for short-circuit calculations. A case study shows very noticeable advantages of the superposition method with regard to memory and time requirements.
AB - This paper contributes to the goals of memory and time-saving optimization methods based on DC approximations. It presents a superposition method for contingencies based on the superposition method for short-circuit calculations. A case study shows very noticeable advantages of the superposition method with regard to memory and time requirements.
KW - DC-modeled contingencies
KW - grid optimization
KW - superposition
UR - http://www.scopus.com/inward/record.url?scp=85215578193&partnerID=8YFLogxK
U2 - 10.1109/AUPEC62273.2024.10807522
DO - 10.1109/AUPEC62273.2024.10807522
M3 - Conference contribution
AN - SCOPUS:85215578193
SN - 979-8-3503-7795-8
T3 - Australasian Universities Power Engineering Conference
BT - 2024 IEEE 34th Australasian Universities Power Engineering Conference, AUPEC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 34th IEEE Australasian Universities Power Engineering Conference, AUPEC 2024
Y2 - 20 November 2024 through 22 November 2024
ER -