Details
| Originalsprache | Englisch |
|---|---|
| Seiten | 20-21 |
| Seitenumfang | 2 |
| Band | 16 |
| Ausgabenummer | 12 |
| Fachzeitschrift | Physics World |
| Publikationsstatus | Veröffentlicht - Dez. 2003 |
Abstract
Currently, magnetic random access memory (MRAM) is the hot candidate to replace conventional dynamic random access memory (DRAM). Researchers at the Paul Drude Institute for Solid State Electronics in Berlin have now proposed an exciting way to use MRAMs to perform logic operations. They showed that a single MRAM cell can be programmed in real time to work as any one of four logical gates: AND, OR, NAND or NOR. Such a device promises a reduction in chip size and a significant increase in computational power because every single logical cell can perform any computational task.
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in: Physics World, Jahrgang 16, Nr. 12, 12.2003, S. 20-21.
Publikation: Beitrag in nicht-wissenschaftlicher/populärwissenschaftlicher Zeitschrift/Zeitung › Beitrag in Publikumszeitung/-zeitschrift › Transfer
}
TY - GEN
T1 - Magnetoelectronics enhance memory
AU - Hägele, Daniel
AU - Oestreich, Michael
PY - 2003/12
Y1 - 2003/12
N2 - Currently, magnetic random access memory (MRAM) is the hot candidate to replace conventional dynamic random access memory (DRAM). Researchers at the Paul Drude Institute for Solid State Electronics in Berlin have now proposed an exciting way to use MRAMs to perform logic operations. They showed that a single MRAM cell can be programmed in real time to work as any one of four logical gates: AND, OR, NAND or NOR. Such a device promises a reduction in chip size and a significant increase in computational power because every single logical cell can perform any computational task.
AB - Currently, magnetic random access memory (MRAM) is the hot candidate to replace conventional dynamic random access memory (DRAM). Researchers at the Paul Drude Institute for Solid State Electronics in Berlin have now proposed an exciting way to use MRAMs to perform logic operations. They showed that a single MRAM cell can be programmed in real time to work as any one of four logical gates: AND, OR, NAND or NOR. Such a device promises a reduction in chip size and a significant increase in computational power because every single logical cell can perform any computational task.
UR - http://www.scopus.com/inward/record.url?scp=1842832911&partnerID=8YFLogxK
U2 - 10.1088/2058-7058/16/12/30
DO - 10.1088/2058-7058/16/12/30
M3 - Contribution in non-scientific journal
AN - SCOPUS:1842832911
VL - 16
SP - 20
EP - 21
JO - Physics World
JF - Physics World
SN - 0953-8585
ER -