Details
| Originalsprache | Englisch |
|---|---|
| Aufsatznummer | 041301 |
| Fachzeitschrift | Japanese Journal of Applied Physics |
| Jahrgang | 57 |
| Ausgabenummer | 4 |
| Frühes Online-Datum | 22 Feb. 2018 |
| Publikationsstatus | Veröffentlicht - Apr. 2018 |
Abstract
Silicon wafers contribute significantly to the photovoltaic module cost. Kerfless silicon wafers that grow epitaxially on porous silicon (PSI) and are subsequently detached from the growth substrate are a promising lower cost drop-in replacement for standard Czochralski (Cz) wafers. However, a wide technological processing window appears to be a challenge for this process. This holds in particularly for the etching current density of the separation layer that leads to lift-off failures if it is too large or too low. Here we present kerfless PSI wafers of high electronic quality that we fabricate on weakly reorganized porous Si with etch current densities varying in a wide process window from 110 to 150 mA/cm2. We are able to detach all 17 out of 17 epitaxial wafers. All wafers exhibit charge carrier lifetimes in the range of 1.9 to 4.3 ms at an injection level of 1015 cm%3 without additional high-temperature treatment. We find even higher lifetimes in the range of 4.6 to 7.0 ms after applying phosphorous gettering. These results indicate that a weak reorganization of the porous layer can be beneficial for a large lift-off process window while still allowing for high carrier lifetimes.
ASJC Scopus Sachgebiete
- Ingenieurwesen (insg.)
- Allgemeiner Maschinenbau
- Physik und Astronomie (insg.)
- Allgemeine Physik und Astronomie
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in: Japanese Journal of Applied Physics, Jahrgang 57, Nr. 4, 041301, 04.2018.
Publikation: Beitrag in Fachzeitschrift › Artikel › Forschung › Peer-Review
}
TY - JOUR
T1 - Kerfless epitaxial silicon wafers with 7ms carrier lifetimes and a wide lift-off process window
AU - Gemmel, Catherin
AU - Hensen, Jan
AU - David, Lasse
AU - Kajari-Schröder, Sarah
AU - Brendel, Rolf
N1 - Publisher Copyright: © 2018 The Japan Society of Applied Physics. Copyright: Copyright 2018 Elsevier B.V., All rights reserved.
PY - 2018/4
Y1 - 2018/4
N2 - Silicon wafers contribute significantly to the photovoltaic module cost. Kerfless silicon wafers that grow epitaxially on porous silicon (PSI) and are subsequently detached from the growth substrate are a promising lower cost drop-in replacement for standard Czochralski (Cz) wafers. However, a wide technological processing window appears to be a challenge for this process. This holds in particularly for the etching current density of the separation layer that leads to lift-off failures if it is too large or too low. Here we present kerfless PSI wafers of high electronic quality that we fabricate on weakly reorganized porous Si with etch current densities varying in a wide process window from 110 to 150 mA/cm2. We are able to detach all 17 out of 17 epitaxial wafers. All wafers exhibit charge carrier lifetimes in the range of 1.9 to 4.3 ms at an injection level of 1015 cm%3 without additional high-temperature treatment. We find even higher lifetimes in the range of 4.6 to 7.0 ms after applying phosphorous gettering. These results indicate that a weak reorganization of the porous layer can be beneficial for a large lift-off process window while still allowing for high carrier lifetimes.
AB - Silicon wafers contribute significantly to the photovoltaic module cost. Kerfless silicon wafers that grow epitaxially on porous silicon (PSI) and are subsequently detached from the growth substrate are a promising lower cost drop-in replacement for standard Czochralski (Cz) wafers. However, a wide technological processing window appears to be a challenge for this process. This holds in particularly for the etching current density of the separation layer that leads to lift-off failures if it is too large or too low. Here we present kerfless PSI wafers of high electronic quality that we fabricate on weakly reorganized porous Si with etch current densities varying in a wide process window from 110 to 150 mA/cm2. We are able to detach all 17 out of 17 epitaxial wafers. All wafers exhibit charge carrier lifetimes in the range of 1.9 to 4.3 ms at an injection level of 1015 cm%3 without additional high-temperature treatment. We find even higher lifetimes in the range of 4.6 to 7.0 ms after applying phosphorous gettering. These results indicate that a weak reorganization of the porous layer can be beneficial for a large lift-off process window while still allowing for high carrier lifetimes.
UR - http://www.scopus.com/inward/record.url?scp=85044421084&partnerID=8YFLogxK
U2 - 10.7567/JJAP.57.041301
DO - 10.7567/JJAP.57.041301
M3 - Article
AN - SCOPUS:85044421084
VL - 57
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
SN - 0021-4922
IS - 4
M1 - 041301
ER -